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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3580 Questions
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  • Answered

    ARMv7 performance monitor:how to get L2 cache refill? 0

    • Cortex-A9
    • Cache
    • Cortex-A
    6569 views
    2 replies
    Latest over 10 years ago
    by hello_arm
  • Answered

    Lock-Step mode execution on Cortex-R5 0

    • Cortex-R
    • Cortex-R5
    30265 views
    5 replies
    Latest over 10 years ago
    by Ravinder
  • Answered

    I am very new to ARM, still understanding the terminologies. What is the difference b/w the Cortex family and the x-gene? 0

    • Cortex-A53
    • Cortex-R
    • Cortex-M3
    • Armv8-A
    • Cortex-A
    • Cortex-M
    10463 views
    7 replies
    Latest over 10 years ago
    by daith
  • Answered

    Why Cortex-R series is real time oriented ? 0

    • Cortex-R
    • Memory Management Unit (MMU)
    • Cortex-A
    • Linux
    20542 views
    5 replies
    Latest over 10 years ago
    by Ravinder
  • Answered

    Why A9 is multicore by A8 doesn't +1

    • Cortex-A9
    • Cache coherency
    • Cortex-A
    • Cortex-A8
    6027 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    ARMv6 performance monitor: Can I record the instruction which caused the data cache miss 0

    • Cache
    • Arm11
    7206 views
    6 replies
    Latest over 10 years ago
    by Zhan Chen
  • Answered

    CPI for ARM V-7 0

    • Armv7
    7561 views
    4 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    Minimal Frequency of Operation 0

    • Armv7
    • Cortex-A
    • Cortex-A8
    10054 views
    6 replies
    Latest over 10 years ago
    by Matthijs van Duin
  • Answered

    Problems with interrupting LDM/STM Cortex M4? +1

    • Armv7-M
    • Cortex-M
    • Cortex-M4
    24487 views
    18 replies
    Latest over 10 years ago
    by Graham Cunningham Arm Employee Badge
  • Answered

    Bare Metal Input/Output - Documentation? 0

    • AMBA
    • ACE
    • AXI
    9078 views
    6 replies
    Latest over 10 years ago
    by Matthijs van Duin
  • Answered

    Is there a list of direct addressing in assembler ? 0

    • GPIO
    • CMSIS
    5869 views
    5 replies
    Latest over 10 years ago
    by Jerome Decamps - 杜尚杰
  • Answered

    Cortex-M MPU limitations +1

    • Cortex-M7
    • Cortex-M
    8266 views
    3 replies
    Latest over 10 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Cache cleaning and invalidating in ARM Cortex-A +1

    • Cache coherency
    • Cortex-A
    8826 views
    1 reply
    Latest over 10 years ago
    by Dave Arm Employee Badge
  • Answered

    Trust Zone on Raspberry Pi unexpected behaviour? +1

    • Arm11
    • TrustZone
    • Rasperry Pi
    6857 views
    3 replies
    Latest over 10 years ago
    by Vamsi Krishna Atluri
  • Answered

    Why I can't find the performance monitoring event for all Instructions count? How to get instructions event for my ARMV7 Cortex-A9 by PMU? 0

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    8539 views
    6 replies
    Latest over 10 years ago
    by hello_arm
  • Answered

    How to get started with ARM Cortex-M3? +1

    • stm32f103rb
    • Cortex-M3
    • Cortex-M
    3942 views
    1 reply
    Latest over 10 years ago
    by Gopal Amlekar
  • Answered

    Guidelines on reducing Cache Miss rate +1

    • Armv7
    • Cortex-R
    • Cache
    • Cortex-A
    • Cortex-M
    10101 views
    2 replies
    Latest over 10 years ago
    by daith
  • Answered

    8-byte stack alignment for ARM Cortex-A9 +1

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    10459 views
    2 replies
    Latest over 10 years ago
    by Holger Elsenheimer
  • Answered

    Cortex-R prefetch behavior? Does it cross page boundary? +1

    4093 views
    2 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    What does it mean to say "ARM Cortex-M processors are entirey C programmable"? +1

    • Cortex-M
    18839 views
    16 replies
    Latest over 10 years ago
    by Matthijs van Duin
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Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone