In RTL code of A9mp platform provided by ARM, I see that almost all registers are renamed and are out of order(There are registers named R0-R55). This make it quite difficult for me to debug some problems.
So how can I match them with R0-R14, especially for SP and LR ?
Hello,
regarding the RTL, we cannot discuss about it here, because it is an NDA matter.
Generally speaking, you can map the physical registers to the corresponding logical registers by decoding the result of the register renaming.
Best regards,
Yasuhiko Koumoto.
In general what gets sent over the JTAG interface is designed to match the architectural state - so for most software debug I would recommend using the debug interface, it is less likely to drive you crazy =)
if you can access the RTL, I think you can also use DSM (Design Simulation Model).
If my memory was correct, DSM shows architectural registers.
Can you use DSM for your program debug?