Hi guys,
I have two questions related to the write-strobing in AXI4. Both examples work on a 32-bit bus.
First consider an unaligned access on address 0x1.
Can this access be created in 2 ways?
1) Addr=0x0, Wrstrb=1110
2) Addr=0x1, Wrstrb=0111
In the second question consider an aligned access to address 0x0 with 3 incremental bursts, awsize=32-bit.
Is it possible, that only parts of these 3 accesses get written due to a strobe pattern like the following: 1011 0010 0011
Thank you in advance!
Best regards,
Martin