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  • Description The latest forum discussions for community-based support for System-on-Chip (SoC) and Arm simulation models.
  • Threads 729 Questions
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  • Suggested Answer

    Write strobe for AXI4 lite 0

    • AXI4-Lite
    • AMBA
    • Interface
    11849 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    needs some clarification +1

    • AXI4-Lite
    • AMBA
    • AXI4
    • Interface
    8721 views
    2 replies
    Latest over 7 years ago
    by bala devi
  • Answered

    AHB_LITE Extended address phase 0

    • AMBA
    • AHB-Lite
    • AHB
    • Interface
    11818 views
    4 replies
    Latest over 7 years ago
    by Muthuvenkatesh
  • Answered

    SMMU emulator/simulator 0

    • Memory Management Unit (MMU)
    • System Memory Management Unit (SMMU)
    9128 views
    2 replies
    Latest over 7 years ago
    by Vincent Siles
  • Suggested Answer

    Relation between Hsel and Hready in AMBA AHB 0

    • AMBA
    • AHB
    • Interface
    14729 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    AHB Lite Response 0

    • AMBA
    • AHB-Lite
    • AMBA 5
    • Interface
    18457 views
    2 replies
    Latest over 7 years ago
    by Muthuvenkatesh
  • Answered

    ACE5 / ACE5 Lite questions for ARBAR/AWBAR, AWSTASH*, and BROADCAST* signals 0

    • AMBA
    • ACE
    • ACE-Lite
    • ACE 5
    11322 views
    3 replies
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Answered

    Further explanation needed for VAxQOSACCEPT, AWAKEUP, ACWAKEUP and SYSO* 0

    • AMBA
    • ACE
    • AXI
    • AMBA 5
    8760 views
    1 reply
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    AXI4-lite :Wready dependency on Awvalid and Wvalid 0

    • AXI4-Lite
    • AMBA
    • Interface
    16080 views
    5 replies
    Latest over 7 years ago
    by Nitin Dixit
  • Suggested Answer

    does ARM v8 bus architecture & related IPs be compatible with v7 core? 0

    • AMBA
    • Armv8
    • Bus Architecture
    • Cortex-A
    8666 views
    1 reply
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Suggested Answer

    In case of AXI4 lite protocol,what is the relation between BValid signal and Wvalid signal? 0

    • AXI4-Lite
    • AMBA
    • Interface
    16712 views
    4 replies
    Latest over 7 years ago
    by Nitin Dixit
  • Answered

    AXI WVALID before AWVALID 0

    • AMBA
    • AXI
    • Interface
    10685 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    I didn't understand the difference between SAU and IDAU. Can you elaborate on it? +1

    • TrustZone
    • Armv8-M
    16554 views
    4 replies
    Latest over 7 years ago
    by Andreas Papaliolios
  • Suggested Answer

    chi protocol 0

    • AMBA
    • CHI
    9999 views
    1 reply
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Not Answered

    unaligned address in AXI protocol 0

    • AMBA
    • AXI
    • AXI4
    15188 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Not Answered

    Project on AXI Bus. 0

    • AMBA
    • AXI
    • Bus Architecture
    7672 views
    1 reply
    Latest over 7 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Regarding WRAP burst calculation in AXI4 0

    • AMBA
    • AXI4
    • Interface
    8400 views
    2 replies
    Latest over 7 years ago
    by pavan316
  • Not Answered

    Flashing STM32L0 0

    • stm32cube
    • Cortex-M0
    • APB Peripherals
    • Cortex-M
    • PrimeCell UART (PL011)
    7048 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    AXI modifiable read access 0

    • AMBA
    • AXI
    • AXI4
    10545 views
    2 replies
    Latest over 7 years ago
    by arc
  • Suggested Answer

    MBERROR : AHB Master bus error status, set when the AHB Master encounters a bus error response from a slave +1

    • AMBA
    • PrimeCell Color LCD Controller (PL111)
    • AMBA AHB Controllers
    • AHB
    11384 views
    3 replies
    Latest over 7 years ago
    by Logicallyfit
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Topics being discussed in this forum
  • ACE
  • AEMv8 FVP
  • AHB
  • AHB5
  • AHB-Lite
  • AMBA
  • AMBA 5
  • AMBA 5 CHI
  • APB
  • Arm Development Studio
  • Armv8-M
  • AXI
  • AXI4
  • Bus Architecture
  • CHI
  • CoreLink NIC-400 Network Interconnect
  • CoreSight
  • Cortex-A
  • Cortex-M
  • DesignStart
  • Fast Models
  • Fixed Virtual Platforms (FVPs)
  • Interface
  • socrates
  • TrustZone