P189, 5.2.1 Dataless transaction without memory update
Why does RN-F0 transition I->UC, rather than UCE or UD? After MakeUnique, RN-F0 has obtained the right to modify the cache line by discarding all other copies, dirty or not, in other caches. The purpose of MakeUnique is to allow RN-F0 to write to it in full when RN-F0 does not care what the data was before (Write after Write).
If it is yet to be modified, the state should be UCE, meaning RN-F0 can modify immediately. If it has already been modified, the state should be UD, meaning RN-F0 has done so immediately receiving Comp_UC.
Either my understanding or the spec is wrong.
This is also mentioned in 4.7.2. UCE should be a transient state not mentioned here.
I agree, the transition should be to UD as the transaction is a MakeUnique and Initial State is Invalid. This appears to be a typo in the document.