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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3624 Questions
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  • Not Answered

    cortex-R5 boot bare_metal code 0

    1013 views
    0 replies
    Started over 3 years ago
    by TTzhang
  • Not Answered

    Expected UART interrupt behavior on mps2_an521 0

    • Interrupt Handling
    • mps2
    1274 views
    0 replies
    Started over 3 years ago
    by SilentMike
  • Suggested Answer

    Can anyone help me to compile a modern kernel for the Psion 5MX? 0

    4290 views
    1 reply
    Latest over 3 years ago
    by Hemendra Arm Employee Badge
  • Not Answered

    Cortex-A53 in i.MX8M Mini - Bare Metal Programming 0

    1832 views
    0 replies
    Started over 3 years ago
    by Navaneethan
  • Not Answered

    Cortex-M1 Set Initial SP Value and the Reset Value 0

    • R15 (PC Program Counter)
    • R13 (SP Stack Pointer)
    • Cortex-M
    1619 views
    0 replies
    Started over 3 years ago
    by Julio Cesar Molina Saqui
  • Not Answered

    how to use LPC1857 on chip non continuous RAM in keil IDE 0

    1098 views
    0 replies
    Started over 3 years ago
    by SantoshMengade
  • Suggested Answer

    ARM Cortex-R7 :: MPU Region Access Control Register (DRACR) Documentation 0

    3111 views
    2 replies
    Latest over 3 years ago
    by EllieC Arm Employee Badge
  • Not Answered

    Where can I find the latest ARM CML Specification for CXL over CXS including IDE 0

    2798 views
    2 replies
    Latest over 3 years ago
    by Anirban Moitra
  • Not Answered

    SAMD21 secure bootlader 0

    1253 views
    0 replies
    Started over 3 years ago
    by simon8
  • Not Answered

    Cortex M7 pipeline 0

    • Cortex-M7
    1562 views
    0 replies
    Started over 3 years ago
    by FWT
  • Not Answered

    Erratic behavior during successive writes to memory-mapped addresses with M55 0

    • Cortex-M55
    888 views
    0 replies
    Started over 3 years ago
    by Ttambe87
  • Suggested Answer

    A53: Load\Store + ALU operation in the same clock 0

    • Cortex-A53
    1301 views
    1 reply
    Latest over 3 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    Can the R7 lock-step mechanism be tested using a scan-chain 0

    • Cortex-R7
    901 views
    0 replies
    Started over 3 years ago
    by NEN
  • Not Answered

    How to build the android12 image available for Fast model? 0

    1937 views
    2 replies
    Latest over 3 years ago
    by Erin89O
  • Not Answered

    Double RTOS kernel running on Cortex-M33 (Trustzone) 0

    • Real Time Operating Systems (RTOS)
    • TrustZone
    • Armv8-M
    1601 views
    0 replies
    Started over 3 years ago
    by a.morniroli
  • Not Answered

    Pending interrupt get's not active in Cortex-M7 0

    1746 views
    0 replies
    Started over 3 years ago
    by Chris0815
  • Not Answered

    Encrypted firmware form ARM cortex M0 SAMD21E17A 0

    997 views
    0 replies
    Started over 3 years ago
    by simon8
  • Answered

    for Cortex-A715 or others I need information of dynamic power , static power for different sleep states with breakeven time and energy penalty. I need it for my study. I have attached the table for reference. How to find out these data for new processors 0

    1491 views
    2 replies
    Latest over 3 years ago
    by hari shanker
  • Answered

    RME: how to share memory pages in non-sec pas with a realm? 0

    1621 views
    2 replies
    Latest over 3 years ago
    by Bokdeuk Jeong
  • Not Answered

    IRQ doesn't call exception table 0

    • Generic Interrupt Controller
    • Arm Dual-Timer Module (SP804)
    1773 views
    2 replies
    Latest over 3 years ago
    by Former Member
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