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Hello,
In some architectures there is capability to load and perform ALU operations in the same clock.
or ALU + store in the same clock.
Can you please tell if A53 has this capability ?
If yes - Are there any intrinsic commands for this feature ?
Or only assembly mnemonic ?
Thank you,
Zvika
The Cortex-A53 supports dual-issuing of most instructions (Features)
You might also find this interesting: https://www.anandtech.com/show/7591/answered-by-the-experts-arms-cortex-a53-lead-architect-peter-greenhalgh
It's an article from AnandTech where they held an AMA with the lead architect on the A53.