Hello,
We have a SOC supplier which has integrated an R7 core to its chip.
The supplier says that as part of the power-up of the SOC, it performs built-in-self-tests to check the HW parts of the chip that are related to the safety functions of the chip, one of them is testing the lock-step mechanism of the R7 core.
The supplier claims that the test that they are performing is a scan-chain.
Another discussion we had with ARM experts said that in order to test the lock-step mechanism, the clock to the redundant core should be stopped so that the lock-step would trigger and then this can be checked.
After the above flow, a reset is required in order to re-set the lock-step monitoring.
Can the above process actually be replaced by a scan-chain process?
Thanks