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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3586 Questions
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  • Answered

    How to read PMU correctly for multi-thread on dual core Cortex-A9 under userspace +1

    • Cortex-A
    10719 views
    4 replies
    Latest over 11 years ago
    by yunwu
  • Answered

    Document on difference between Cortex-A / -R / -M 0

    18688 views
    3 replies
    Latest over 11 years ago
    by Chris Shore
  • Answered

    Assembly example for programming ARM Cortex-M4 +1

    • Cortex-M
    16818 views
    8 replies
    Latest over 11 years ago
    by Jens Bauer
  • Answered

    Clean and Invalidate Cache Memory 0

    37234 views
    1 reply
    Latest over 11 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    The exact definition of outer and inner in ARMv7 0

    • CHI
    • Cortex-A
    • Memory
    29832 views
    2 replies
    Latest over 11 years ago
    by mars
  • Not Answered

    what is the difference between the device memory and the strongly-order memory ? 0

    • Armv7
    • Memory
    11421 views
    4 replies
    Latest over 11 years ago
    by mars
  • Answered

    How to do code coverage analysis on ARM Cortex-M0? 0

    • Cortex-M
    10007 views
    6 replies
    Latest over 11 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    AXI FIXED burst ; Wr/Rd narrow transactions. +1

    • AMBA
    • AXI
    11277 views
    1 reply
    Latest over 11 years ago
    by Xingguang Feng Arm Employee Badge
  • Answered

    AXI WR address channel info arriving before, or, after WR data channel info. 0

    • AXI
    15359 views
    4 replies
    Latest over 11 years ago
    by Xingguang Feng Arm Employee Badge
  • Answered

    Division by non-power-of-2 hits into exception 0

    • Cortex-R4
    5084 views
    3 replies
    Latest over 11 years ago
    by Zhe Cui
  • Answered

    How to jumpstart an ARM9 board from its SD slot? 0

    • Arm9
    • Embeded Linux
    • Linux
    18664 views
    12 replies
    Latest over 11 years ago
    by Gergely Imreh
  • Answered

    Hi, regarding AXI wrte strobe functionality... +1

    • AMBA
    • AXI
    3965 views
    1 reply
    Latest over 11 years ago
    by Xingguang Feng Arm Employee Badge
  • Answered

    MakeUnique Transaction (ACE protocol) 0

    • AMBA
    • ACE
    • AXI
    • AXI4
    4804 views
    1 reply
    Latest over 11 years ago
    by Rakesh Reddy
  • Answered

    Are there any restrictions for the width of an address signal in an AXI4 interface? 0

    • AMBA
    • AXI
    • AXI4
    5689 views
    2 replies
    Latest over 11 years ago
    by Martin Stolpe
  • Answered

    AMBA 5 CHI Specifications 0

    • AMBA
    • CHI
    • AMBA 5
    8370 views
    4 replies
    Latest over 11 years ago
    by Rakesh Reddy
  • Answered

    question about Part C: Debug Architecure in ARMv7 ARM.pdf 0

    • Armv7
    • Debugger
    5248 views
    1 reply
    Latest over 11 years ago
    by Ma Lei (马磊) Arm Employee Badge
  • Answered

    Cache maintenance and DMA +1

    • Cache coherency
    • Cache
    • Armv7-R
    • Cortex-R4
    6997 views
    3 replies
    Latest over 11 years ago
    by Michael Pulice
  • Answered

    What is the lowest frequency I can run ARM Cortex-A9 Processor ? 0

    • Cortex-A9
    4906 views
    2 replies
    Latest over 11 years ago
    by Sherry
  • Not Answered

    Anybody has the differences btwn the cores 0

    • Cortex-A
    3718 views
    4 replies
    Latest over 11 years ago
    by daith
  • Answered

    compiling kernel: -mcpu=cortex-a15 vs -march=armv7ve? +1

    • Linaro
    • Armv7
    • Cortex-A15
    • GCC
    6250 views
    1 reply
    Latest over 11 years ago
    by chinatiger
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Topics being discussed in this forum
  • AArch64
  • AMBA
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