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Cache maintenance and DMA

Greetings ARM community,

I have been tasked with cache maintenance.  The necessity popped up because of DMA issues on USB.

As a quick (not perm solution) I used the invalidate all routine.  While obviously not nominal in anyway

it does allow me to continue with USB tasks.

This is the assy for that. Pretty common example from the Cortex R4 and ARM ARM.

                MRC p15, 0, r0, c1, c0, 0 ; Read System Control Register configuration data

                DSB 0x0f

                MCR p15, 0, r0, c15, c5, 0 ; Invalidate entire data cache

                ISB 0x0f

                BX lr

                ENDFUNC

Moving forward I am trying to implement the invalidation by MVA to PoC and having no luck. This is my first go at this so it more than likely my misunderstanding which command to use.

If I can ask; which invalidate by MVA should I be using?  Is their a paper or section of the document arm arm to point it out?

The memory is configured as write-through.

I am going to experiment more with the other MVA to UoC but I want to gain a better understanding of this.

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