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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Answered

    PLEASE HELP ME (AMBA3 AXI) 0

    • AMBA
    • AMBA 3
    • AXI
    5295 views
    2 replies
    Latest over 10 years ago
    by Cao Phi Ho
  • Answered

    How to schedule Secure/Normal kernels in TrustZone implementation? +1

    • Armv7-A
    • Armv8-A
    • TrustZone
    6591 views
    2 replies
    Latest over 10 years ago
    by Kaiyuan
  • Answered

    ARMv8 exception vector significance of EL0_SP 0

    • Armv7-M
    • Cortex-M
    • Armv8-M
    4373 views
    2 replies
    Latest over 10 years ago
    by daith
  • Answered

    AMBA AHB TRANSFER CONTINUE AFTER ERROR RESPONSE +1

    • AMBA
    • AHB
    20277 views
    10 replies
    Latest over 10 years ago
    by Vishal
  • Answered

    Are any companies planning to release a Cortex-M7 IC with lock-step? +1

    • Cortex-M7
    • Automotive Safety Integrity Level (ASIL)
    4041 views
    4 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    Please help about AMBA AXI 3.0 0

    • AMBA
    • AXI3
    • AXI
    6988 views
    5 replies
    Latest over 10 years ago
    by Kiêm Nhật Minh
  • Answered

    Accurate cycles measurement 0

    • 32-bit
    • 64-bit
    • Linux
    7407 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Could you explain this assembly line to me? 0

    • Thumb
    6151 views
    2 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Basic tests on Cortex-A9, Cortex-A5x 0

    • Cortex-A9
    • Cortex-A5
    • Cortex-A
    4600 views
    1 reply
    Latest over 10 years ago
    by Chris Shore
  • Answered

    Difference between Sub regions and Overlapping Regions in MPU 0

    • Memory Protection Unit (MPU)
    10832 views
    4 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    General Feature of Cortex processors on cache coherency 0

    • AMBA
    • Cortex-A9
    • Cache coherency
    • Cortex-A
    7794 views
    3 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    code compile using -mcpu for ARM platform +1

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    • Cortex-A8
    7941 views
    5 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    IRQ handler not called by ARM A53 0

    • Cortex-A53
    • Generic Interrupt Controller
    • Cortex-A
    14747 views
    12 replies
    Latest over 10 years ago
    by Deepak Jharodia
  • Answered

    Usage of Split/Lock Configuration +1

    • Cortex-R
    • Cortex-R5
    • Cortex-A
    5819 views
    4 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    SMMU related question. 0

    • 32-bit
    • Memory Protection Unit (MPU)
    14369 views
    9 replies
    Latest over 10 years ago
    by Jay Zhao
  • Answered

    STREX always clears the exclusive access tag 0

    • Armv7-A
    • Armv7-R
    • Cortex-A
    6190 views
    2 replies
    Latest over 10 years ago
    by Gustavo A. R. Silva
  • Answered

    [Cortex-M0] Thumb mode & code size 0

    • Cortex-M0
    • Thumb
    • Cortex-M
    • Thumb2
    8828 views
    4 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Power Management Options in Cortex A 0

    • Juno Arm Development Platform
    • Cortex-A53
    • Cortex-A57
    • Cortex-A
    5632 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    share memory between core0 (linux) and core1 (bare-metal) +1

    • Cortex-A9
    • Cortex-A
    • Linux
    10336 views
    3 replies
    Latest over 10 years ago
    by Mike
  • Answered

    [CM3]assembly language trouble +1

    • Cortex-M3
    • Cortex-M
    • C
    6387 views
    6 replies
    Latest over 10 years ago
    by stupidMokey
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Topics being discussed in this forum
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