AXI4:what will happen if there is a AXI rd and wr concurrently for a same address for a particular slave??
Hello sourav,
If the read and write came at the same time, a normal implementation will precede the read.
However, it would be implementation dependent.
If the write came before the read, we should sometimes the read-after-write issue.
It would depend on the BVALID timing by the slave. If the read arrives after the BVALID, the read should be read the written data of which initiate the BVALID. If the read arrives before the BVALID, the read data might be the data before written.
Best regards,
Yasuhiko Koumoto.