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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3600 Questions
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  • Not Answered

    ARM Trusted Firmware Cluster Power Down Duration 0

    3037 views
    1 reply
    Latest over 9 years ago
    by daith
  • Answered

    Can't understand the difference between armv7e-m and armv7e-m-pic? 0

    • Armv7
    • Cortex-M7
    • Armv7-M
    • Digital Signal Processor (DSP)
    14266 views
    3 replies
    Latest over 9 years ago
    by Bilal Wasim
  • Answered

    Getting ERROR "unknown mnemonics for UQSUB8 instruction" 0

    • AArch64
    • Armv8-A
    • 64-bit
    12807 views
    4 replies
    Latest over 9 years ago
    by Myy
  • Answered

    Warning: It blocks containing 32-bit Thumb instructions are deprecated in ARMv8 with GCC 4.9 +1

    • 32-bit
    • Armv8
    • GCC
    • Cortex-M53
    • Thumb
    • Cortex-M
    13574 views
    4 replies
    Latest over 9 years ago
    by Michael Williams Arm Employee Badge
  • Answered

    Use-cases of AXI3 unaligned transfers +1

    • 32-bit
    • AXI3
    6392 views
    2 replies
    Latest over 9 years ago
    by Diandian Zhang
  • Answered

    I am working on ahb bridge , I am trying to sample address when hready is high . +1

    • AHB-Lite
    • AMBA 2
    • AHB
    7365 views
    4 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Hard Fault in cortex m4 +1

    • Armv7-M
    • Memory Management Unit (MMU)
    • Cortex-M
    • Cortex-M4
    21930 views
    7 replies
    Latest over 9 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    AMBA3 AXI - Exclusive access - 04/16/2015 0

    • AMBA 3
    • AXI
    9509 views
    14 replies
    Latest over 9 years ago
    by Diandian Zhang
  • Answered

    In AXI Interface, is the VALID signal of the master dependent on the slave's READY signal +1

    • AXI
    14450 views
    1 reply
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex A code / function alignment 0

    • Armv7-A
    • Thumb
    • Cortex-A
    • AArch32
    5684 views
    1 reply
    Latest over 9 years ago
    by Matt Sealey Arm Employee Badge
  • Answered

    is it necessary for ARM-v8 soc to flush L2 cache to DRAM ? 0

    • Cortex-A57
    • Arm Trusted Firmware
    • Armv8
    • Cache
    • Cortex-A
    11109 views
    4 replies
    Latest over 9 years ago
    by RadarSong
  • Answered

    MMU deactivation and I-Cache / Branch Predictor 0

    • Armv7-A
    • Cache
    • Armv7-R
    • Memory Management Unit (MMU)
    6327 views
    2 replies
    Latest over 9 years ago
    by Vincent Siles
  • Answered

    reason for ARMv8 EDSCR err bit set 0

    • Armv8
    • Cortex-A
    • Cortex-53
    • AArch32
    16812 views
    6 replies
    Latest over 9 years ago
    by Ekaterina Trofimova
  • Answered

    ARM926EJ-S, Can a STMIA result in four single accesses instead of a burst? +1

    • 32-bit
    • Arm9
    7993 views
    5 replies
    Latest over 9 years ago
    by Chris Shore
  • Not Answered

    maximum level of functions than can be called within 0

    • Cortex-M3
    • Cortex-M
    4424 views
    5 replies
    Latest over 9 years ago
    by NABEEN LAL AMATYA
  • Answered

    Memory protection unit - Cortex-M4 0

    • Cortex-M
    • Cortex-M4
    6773 views
    2 replies
    Latest over 9 years ago
    by Matic
  • Not Answered

    Code optimization for a Samsung S5P6818 Octa-Core Cortex-A53, 400M Hz - 1.4G Hz 0

    • Cortex-A53
    • Cortex-A
    11352 views
    6 replies
    Latest over 9 years ago
    by Carlos Delfino
  • Answered

    Usefulness of MPU in a non-OS system 0

    • Cortex-M
    • Cortex-M4
    6575 views
    4 replies
    Latest over 9 years ago
    by Matic
  • Not Answered

    VTOR: offset address configuration 0

    • Cortex-M
    • Cortex-M4
    6116 views
    2 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Not Answered

    Performance effect because of removing some instructions from ARMv8? 0

    • Cortex-A72
    • 32-bit
    • Armv7
    • Cortex-A15
    • Armv8
    • Cortex-A
    11771 views
    7 replies
    Latest over 9 years ago
    by G. Goodwin L. Pitos
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Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone