HI,
I am using an armv5TE (mv78100)I wonder if I need to implement memory barriers in this architecture,(some people say not needed)
reason for my question is that I am facing system total freeze(now and then) and I suspect the system(freebsd) beeing on the idle loop!
Thanks
Hi qabsou,
do you want the other than the following?
DSB MCR p15,0,<Rd>,c7,c10,4DMB MCR p15,0,<Rd>,c7,c10,5
If it is true, could you tell what kind of what kind of a memory barrier which you want?
Best regards,
Yasuhiko Koumoto.
Hi,
Thanks for your attention,
I wonder if I need to implement barriers(I have total freeze problems), I wonder this becauseit is written that ARMv5TE does not have instruction optimization.
I am thinking about the problem when instructions after interrupt enable are executed before
the interrupt enable instruction, this can lead to hang on idle loop.
Från: yasuhikokoumoto <community@arm.com>
Till: kalle <tsmoseby@yahoo.no>
Skickat: tisdag, 13 december 2016 3:19
Ämne: Re: - armv5TE
armv5TE
reply from yasuhikokoumoto in kalle - View the full discussionHi qabsou,
do you want the other than the following?DSB MCR p15,0,,c7,c10,5If it is true, could you tell what kind of what kind of a memory barrier which you want? Best regards,Yasuhiko Koumoto.
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Architecturally you need to include barriers where ever the architecture says you need to include barriers; anything else is making assumptions about the CPU micro-architecture which may work on some CPUs and not on others.
Many of the early ARMv5TE cores developed by ARM, such as the ARM926, were relatively simple micro-architectures so you could "get away with it" if you omitted certain barriers, but this is certainly not recommended practice and not likely to be portable. There are a number of alternative ARMv5TE implementations from ARM architecture licensees which have totally different microarchitectures, such as the Sheeva family CPU in your SoC, which may include other optimizations and therefore be stricter in terms of the need to have barriers present.
In short: the only way to write portable code is to include all of the barriers that the architecture requires.
HTH,
Pete