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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3641 Questions
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  • Answered

    How the current consumption is affected by instruction address +1

    • Cortex-M
    • Cortex-M4
    4669 views
    2 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    How does matrix4x2 implement in busmatrix? +1

    • Cortex-M3
    • Cortex-M
    3808 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    How to use compiled Hex file from Keil on windows to the design_start? +1

    • Cortex-M0
    • Cortex-M3
    • Cortex-M
    4457 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Cortex-M4 Suspend/Resume Interrupts 0

    • Cortex-M
    • Cortex-M4
    4579 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    ARMv8 Assembly Language IDE 0

    • Raspberry Pi
    • Arm Development Studio
    • Armv8
    • Arm Assembly Language (ASM)
    • AArch32
    15944 views
    4 replies
    Latest over 8 years ago
    by AnthonyPaulO
  • Answered

    Cortex M4: Atomic and Cache +1

    • Cortex-M
    • Cortex-M4
    8844 views
    2 replies
    Latest over 8 years ago
    by DRACO
  • Answered

    Endian in Cortex-M4 +1

    • Armv7-M
    • Cortex-M
    • Cortex-M4
    20748 views
    1 reply
    Latest over 8 years ago
    by WestfW
  • Answered

    How to create jump-tables in Armv8 Arm32 assembly language? 0

    • Raspberry Pi
    • Armv8-A
    16294 views
    5 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    CORTEX M4 - Output an array declared with __DATA(RAM) attribute? 0

    • Cortex-M
    • Cortex-M4
    7670 views
    6 replies
    Latest over 8 years ago
    by Andrea Bettati
  • Answered

    PC doesn't update in simulation 0

    • CMSDK
    • Cortex-M
    4078 views
    2 replies
    Latest over 8 years ago
    by ele
  • Answered

    Question about the Pipeline, clock cycle and machine cycle in Cortex-M Series. +2

    • Cortex-M0
    • Cortex-M7
    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    33674 views
    11 replies
    Latest over 8 years ago
    by Vanhealsing
  • Answered

    Aarch64 Port +1

    • 32-bit
    • AArch64
    • Armv8
    • Arm Assembly Language (ASM)
    6093 views
    1 reply
    Latest over 8 years ago
    by shaygalon
  • Answered

    CortexM4:How to change the entrypoint by binary file data in the program +1

    • Keil
    • Cortex-M
    • Cortex-M4
    5658 views
    2 replies
    Latest over 8 years ago
    by rhino
  • Suggested Answer

    SMP to suspend an individual core with security OS 0

    • Cortex-A53
    • Cortex-A
    • TrustZone
    • AArch32
    5614 views
    1 reply
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    Cortex-M0+ JTAG state doesn't reset in simulation when tying nTRST high and trying synchronously reset through TMS +1

    • Cortex-M0
    • Cortex-M
    3316 views
    1 reply
    Latest over 8 years ago
    by daviesja
  • Answered

    instructions fetch 0

    • stm32f103
    • SRAM
    • Cortex-M3
    • Cortex-M
    6149 views
    3 replies
    Latest over 8 years ago
    by Vanhealsing
  • Answered

    TTBR1_EL1 aligment 0

    • AArch64
    • Armv8-A
    6290 views
    5 replies
    Latest over 8 years ago
    by Vincent Siles
  • Answered

    SPI VIP 0

    • Cortex-A
    5680 views
    3 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    What is special with MVN instruction, when both source and destination register is same? +1

    • Cortex-M
    • Cortex-M4
    3572 views
    1 reply
    Latest over 8 years ago
    by 42Bastian Schick
  • Not Answered

    Platform security architecture is announced by Arm 0

    • Architecture
    • web
    • CHI
    • Security
    • Class
    • TrustZone
    • Armv8-M
    • Internet of Things (IoT)
    6402 views
    0 replies
    Started over 8 years ago
    by Diya Soubra Arm Employee Badge
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