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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3584 Questions
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  • Answered

    How does the BTIC(branch target instruction cache) works? 0

    • Cache
    • Cortex-A
    • Cortex-A7
    15945 views
    3 replies
    Latest over 10 years ago
    by Hanni Lozano
  • Answered

    Software Radio Based on ZedBoard and AD-FMCOMMS1-EBZ +1

    • Cortex-A9
    • Cortex-A
    • Linux
    8843 views
    3 replies
    Latest over 10 years ago
    by hgli
  • Answered

    The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean? 0

    • NEON
    • Cortex-A
    • Cortex-A7
    10469 views
    4 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    How to measure program execution time in ARM Cortex-A53 processor? +1

    • Cortex-A53
    • Cortex-A57
    • AArch64
    • Cortex-A15
    • Armv8-A
    • Cortex-A
    12869 views
    2 replies
    Latest over 10 years ago
    by Rajeev Verma
  • Answered

    Pseudocode for saturation (Oh no, not again) 0

    • Cortex-A
    • Cortex-A7
    4047 views
    2 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    What's the single cycle Load-Use in ALU mean?(In Cortex-A7) 0

    • Cache
    • Cortex-A
    • Cortex-A7
    6639 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    UNPREDICTABLE in instruction description (Lord! yet another question) 0

    • Cortex-A
    • Cortex-A7
    7262 views
    7 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Register 'names' in instruction descriptions +1

    • Cortex-A
    • Cortex-A7
    12649 views
    3 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Not Answered

    NEON: Cortex A7 is 4 times slower than Cortex A8 ? 0

    • NEON
    • Cortex-A
    • Cortex-A7
    • Cortex-A8
    14398 views
    6 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    Why does Cortex-R kernel only support Thumb-2? 0

    • Cortex-R
    • Cortex-A
    • Thumb2
    6316 views
    4 replies
    Latest over 10 years ago
    by Kun.Niu
  • Answered

    In Cortex-R4, the interrupt from which part to send to the core? 0

    • Cortex-R
    • Cortex-A
    • Cortex-R4
    5583 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Coprocessor instruction differencies? +1

    • Cortex-A
    • Cortex-A7
    5881 views
    4 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    ARM cortex A15 hardware simulatenous multihreading. +1

    • Cortex-A15
    • Cortex-A
    3516 views
    1 reply
    Latest over 10 years ago
    by daith
  • Answered

    Cortex-R doesn't have MMU, is this has some advantages? +1

    • Processor
    • Cortex-A
    4554 views
    2 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    Cortex-A7 contains MMU I want ask the MMU is contained in which part of the diagram? 0

    • Cortex-A
    • Cortex-A7
    6449 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    What's the difference between ETM and Debug? 0

    • Cortex-R
    • Cortex-R4
    10568 views
    2 replies
    Latest over 10 years ago
    by Kun.Niu
  • Answered

    When the data CPU wants to access is not in the cache the related block will always be copy to the cache, is this right? 0

    • Cache
    • Cortex-A
    6551 views
    4 replies
    Latest over 10 years ago
    by Kun.Niu
  • Answered

    What's the cortex-A7 pipeline's in-order and cortex-A15 pipeline's out-of-order mean? 0

    • Cortex-A15
    • Cortex-A
    • Cortex-A7
    9531 views
    4 replies
    Latest over 10 years ago
    by Kun.Niu
  • Answered

    Cortex-A series's pipeline is for only one core or for all cores? 0

    • Cortex-A
    • Cortex-A7
    • Cortex-A8
    4700 views
    2 replies
    Latest over 10 years ago
    by Kun.Niu
  • Answered

    Cortex-A7 structure can support max to 4 cores, I want ask the 4 cores have 4 part copy of the registers(37 registers * 4)? 0

    • Cortex-A
    • Cortex-A7
    3754 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
<>
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