Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums
Architectures and Processors forum
  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3586 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • Answered

    Instruction Fetches from Peripheral Memory Space 0

    • ACE
    • TrustZone
    • Instruction Fetch
    • Armv8-M
    • Memory
    15857 views
    6 replies
    Latest over 8 years ago
    by Diya Soubra Arm Employee Badge
  • Not Answered

    Core definition is missing - Cortex-R5 (reconfiguring database) 0

    • DS-5 Community Edition
    2956 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    DIscussion, Cortex-a53 support pthread with 4 cores work together 0

    6953 views
    3 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    NIC-400 remapping +1

    4998 views
    1 reply
    Latest over 8 years ago
    by fengxg001
  • Answered

    Boot Sequence of ARM Cortex, ARMCC +1

    • MDK-Arm
    • Keil
    • Cortex-M
    11460 views
    3 replies
    Latest over 8 years ago
    by ijaz.a100
  • Answered

    4 Bytes repeating when using memcpy +1

    9828 views
    6 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    What is the performance difference in writing C and C++ code for ARM Cortex M7 mcu ? +1

    • Cortex-M7
    • STM32 F7
    21018 views
    4 replies
    Latest over 8 years ago
    by Jens Bauer
  • Answered

    How to get started with ARM cortex R series programming? 0

    • Cortex-R
    • Software Development
    6783 views
    2 replies
    Latest over 8 years ago
    by PraveenMax
  • Answered

    Cortex M3 : what determines the cycle count for a variable cycle count instruction? +1

    • 32-bit
    • Cortex-M3
    12978 views
    4 replies
    Latest over 8 years ago
    by daith
  • Suggested Answer

    How to ensure the safety of SP_EL0 0

    • ARMv8 Exception Model
    • Armv8-A
    5758 views
    2 replies
    Latest over 8 years ago
    by chendader
  • Answered

    Flat memory model 0

    7451 views
    4 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    How to explain the harvard architecture of ARM processor at instruction level? +1

    24922 views
    2 replies
    Latest over 8 years ago
    by daith
  • Answered

    Why Arm cpu doesn't have more core than Intel cpu? 0

    3955 views
    1 reply
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    AXI 4 burst boundary +1

    16193 views
    3 replies
    Latest over 8 years ago
    by Duke Thrust
  • Answered

    Disabling L2 cache for CPU1 (Zynq-7000) +1

    • Cortex-A9
    • Cache
    • L2
    18287 views
    5 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    Help with programming STM32F103RCT6 board. +1

    • Cortex-M3
    • Cortex-M
    • STM32F
    5499 views
    1 reply
    Latest over 8 years ago
    by MrHarmonSr
  • Answered

    ARMv8 backwards compatibility with ARMv7 0

    • Armv7
    • Armv8-A
    • AArch32
    • Linux
    20399 views
    2 replies
    Latest over 8 years ago
    by arunsvasan
  • Not Answered

    [Cortex-M33 FVP]:SecureFault with SAU disable 0

    • ANSI
    • RTX
    • ACE
    • CHI
    • Security
    • Cortex-M3
    • Keil
    • Cortex-M
    • TrustZone
    • Cortex-M33
    • Armv8-M
    • Memory
    17938 views
    6 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    Virtual IRQ/FIQ exceptions with ARMv8 and no GIC 0

    5726 views
    4 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Suggested Answer

    How NS bit is set in case of DMA transfer ? 0

    • AXI
    • TrustZone
    • Armv8-M
    10139 views
    2 replies
    Latest over 8 years ago
    by Diya Soubra Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone