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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3600 Questions
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  • Answered

    What is the performance difference in writing C and C++ code for ARM Cortex M7 mcu ? +1

    • Cortex-M7
    • STM32 F7
    21211 views
    4 replies
    Latest over 8 years ago
    by Jens Bauer
  • Answered

    How to get started with ARM cortex R series programming? 0

    • Cortex-R
    • Software Development
    6855 views
    2 replies
    Latest over 8 years ago
    by PraveenMax
  • Answered

    Cortex M3 : what determines the cycle count for a variable cycle count instruction? +1

    • 32-bit
    • Cortex-M3
    13139 views
    4 replies
    Latest over 8 years ago
    by daith
  • Suggested Answer

    How to ensure the safety of SP_EL0 0

    • ARMv8 Exception Model
    • Armv8-A
    5786 views
    2 replies
    Latest over 8 years ago
    by chendader
  • Answered

    Flat memory model 0

    7584 views
    4 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    How to explain the harvard architecture of ARM processor at instruction level? +1

    25283 views
    2 replies
    Latest over 8 years ago
    by daith
  • Answered

    Why Arm cpu doesn't have more core than Intel cpu? 0

    4004 views
    1 reply
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    AXI 4 burst boundary +1

    16418 views
    3 replies
    Latest over 8 years ago
    by Duke Thrust
  • Answered

    Disabling L2 cache for CPU1 (Zynq-7000) +1

    • Cortex-A9
    • Cache
    • L2
    18502 views
    5 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    Help with programming STM32F103RCT6 board. +1

    • Cortex-M3
    • Cortex-M
    • STM32F
    5576 views
    1 reply
    Latest over 8 years ago
    by MrHarmonSr
  • Answered

    ARMv8 backwards compatibility with ARMv7 0

    • Armv7
    • Armv8-A
    • AArch32
    • Linux
    20620 views
    2 replies
    Latest over 8 years ago
    by arunsvasan
  • Not Answered

    [Cortex-M33 FVP]:SecureFault with SAU disable 0

    • ANSI
    • RTX
    • ACE
    • CHI
    • Security
    • Cortex-M3
    • Keil
    • Cortex-M
    • TrustZone
    • Cortex-M33
    • Armv8-M
    • Memory
    18076 views
    6 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Not Answered

    Virtual IRQ/FIQ exceptions with ARMv8 and no GIC 0

    5828 views
    4 replies
    Latest over 8 years ago
    by Peter Rielly Arm Employee Badge
  • Suggested Answer

    How NS bit is set in case of DMA transfer ? 0

    • AXI
    • TrustZone
    • Armv8-M
    10185 views
    2 replies
    Latest over 8 years ago
    by Diya Soubra Arm Employee Badge
  • Suggested Answer

    Is there any ARMv8-M platform that support TrustZone? 0

    • TrustZone
    • Armv8-M
    10327 views
    3 replies
    Latest over 8 years ago
    by Diya Soubra Arm Employee Badge
  • Answered

    Non-Secure Software installing SG instructions into Secure Memory 0

    • TrustZone Controllers
    • Controllers
    • TrustZone
    • System Design
    • Armv8-M
    • Block
    • Secure Transactions
    • Memory
    15322 views
    5 replies
    Latest over 8 years ago
    by Gabriel Wang Arm Employee Badge
  • Answered

    How memory type is decided when MMU is disabled ? +1

    7636 views
    1 reply
    Latest over 8 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    Replacing branch-instruction with address assignment to PC 0

    • Cortex-M
    • Arm Assembly Language (ASM)
    • Cortex-M4
    6360 views
    4 replies
    Latest over 8 years ago
    by Raad
  • Suggested Answer

    Control access to L2 cache 0

    5898 views
    5 replies
    Latest over 8 years ago
    by christoph8446
  • Answered

    ARM assembly +2

    • Arm Assembly Language (ASM)
    6040 views
    5 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone