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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Answered

    Is SVC pendable on cortex-m? +1

    • Armv7-M
    • Cortex-M
    9417 views
    6 replies
    Latest over 7 years ago
    by loquat3
  • Answered

    [Cortex-A53] STP instruction stores out of the specified memory +1

    • Cortex-A53
    • Cortex-A
    • Armv8.1-A
    7490 views
    4 replies
    Latest over 7 years ago
    by Emmy0
  • Answered

    Cortex M3, PrimeCell uDMAC bus arbitration 0

    • Cortex-M3
    • Cortex-M
    3142 views
    2 replies
    Latest over 7 years ago
    by acoad
  • Answered

    How to start boot up in the region of 0x1000 memory address (Cortex-M0) 0

    • Cortex-M0
    • Cortex-M
    7202 views
    5 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    An algorithm on a M7 is slower than on M4 - why? 0

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    12434 views
    11 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    Cortex M4 - Returning from Interrupt 0

    • Cortex-M
    • Cortex-M4
    13275 views
    5 replies
    Latest over 7 years ago
    by JBD
  • Answered

    Does Cortex-M3/M4 continue with burst in response to ERROR? 0

    • AMBA
    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    • AHB
    3834 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Launching bare-metal firmware at EL2 (Hyp) on QEMU with ARM Trusted Firmware? +1

    • Cortex-A57
    • Arm Trusted Firmware
    • AArch64
    • Cortex-A
    9210 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    Trust OS for cortex A-53 0

    • TrustZone
    • Armv8-M
    6954 views
    1 reply
    Latest over 7 years ago
    by four
  • Suggested Answer

    Instruction width selection - forward/external reference 0

    • Thumb2
    3521 views
    3 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Correct way to mask interrupts in secure world ARMv8M M33 0

    • Address
    • RTX
    • Security
    • Armv8-A
    • TrustZone
    • Armv8-M
    • Interrupt
    29127 views
    8 replies
    Latest over 7 years ago
    by sanjeev
  • Answered

    cortex m0 0

    • Cortex-M0
    • Armv6-M
    • Cortex-M
    5514 views
    2 replies
    Latest over 7 years ago
    by Sean Dunlevy
  • Suggested Answer

    how to set pendsv bit in ARM7 0

    • Interrupt Handling
    • Cortex-M
    • Arm Assembly Language (ASM)
    4602 views
    1 reply
    Latest over 7 years ago
    by daith
  • Answered

    Trying to find basic performance measurements of ARM cores 0

    • Cortex-A9
    • Cortex-M7
    • Cortex-A
    • Cortex-M
    14586 views
    4 replies
    Latest over 7 years ago
    by Sean Dunlevy
  • Suggested Answer

    [A53] Hex file is Huge when generated fromo ELF 0

    • Cortex-A53
    • Cortex-A
    5644 views
    3 replies
    Latest over 7 years ago
    by a.surati
  • Answered

    Adding External E2PROM, PROM or SRAM to a basic M0 development board 0

    • Cortex-M0
    • Cortex-M
    6438 views
    6 replies
    Latest over 7 years ago
    by Sean Dunlevy
  • Suggested Answer

    Sampling/tracing memory addresses 0

    • Cortex-A72
    • Trace
    • Cortex-A
    • Cortex-A7
    • Memory
    6159 views
    1 reply
    Latest over 7 years ago
    by Tony Armitstead Arm Employee Badge
  • Answered

    Cortex A53 : Cache policy setting 0

    • Cortex-A53
    • Cache
    • Cortex-A
    8719 views
    4 replies
    Latest over 7 years ago
    by MarekBykowski
  • Suggested Answer

    Why linux set memory as inner shareable in multi-cluster ARMv8 cores? 0

    • Cortex-A53
    • Cortex-A57
    • Cache coherency
    • Armv8-A
    • Cortex-A
    13544 views
    7 replies
    Latest over 7 years ago
    by thomas_cp
  • Answered

    MFLOPS of M4F 0

    • Cortex-M
    • Cortex-M4
    7651 views
    2 replies
    Latest over 7 years ago
    by Timm Hinrichs
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Topics being discussed in this forum
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