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Hi,
From a previous question I got that setting the EPDx bits from the TCR_ELx register to 1 will disable table walk.
Good starting point. But, should I access the same memory location again, it won't be in the TLB cache.
How to work around that?
Thanks
The EPD bits just table walks, they aren't intended as an alternative to translation tables. You might set one when the region is unused, or when you're making multiple changes to a translation regime and want them applied in one go. so the assumption would be that you aren't (deliberately) accessing the region covered by the EPD bit while it was set.