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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3581 Questions
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  • Answered

    armv7a/armv8 : Undefined Abort Exception and MMU 0

    • Armv7-A
    • ARMv8 Exception Model
    • Armv7 Exception Model
    • Armv8-A
    • Memory Management Unit (MMU)
    8810 views
    4 replies
    Latest over 7 years ago
    by Vincent Siles
  • Answered

    Assembler change immediate value of one assembly instruction +1

    • Keil MDK
    • Cortex-M0
    • Cortex-M
    4712 views
    1 reply
    Latest over 7 years ago
    by a.surati
  • Suggested Answer

    Cortex-M0 hangs up after soft reset 0

    • Cortex-M0
    • Cortex-M
    12231 views
    6 replies
    Latest over 7 years ago
    by mantasd
  • Suggested Answer

    Cortex-A53 backward compatible with AXI-4 interconnect 0

    • Cortex-A53
    • AXI4
    • Cortex-A
    5293 views
    2 replies
    Latest over 7 years ago
    by Christopher Tory Arm Employee Badge
  • Answered

    cortex-m0 address branching from ROM to RAM 0

    • Cortex-M0
    • Cortex-M
    4530 views
    2 replies
    Latest over 7 years ago
    by Artifical Intelligence
  • Suggested Answer

    Cortex-A5 area measurement with and without FPU 0

    • Cortex-A5
    • Cortex-A
    4333 views
    1 reply
    Latest over 7 years ago
    by Carl Williamson Arm Employee Badge
  • Answered

    How to know if a RAM is compatible with an architecture or a processor? 0

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    12990 views
    4 replies
    Latest over 7 years ago
    by vstehle Arm Employee Badge
  • Answered

    Interrupt collector 0

    • Cortex-A53
    • Cortex-A
    3819 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    ARM Cortex A9 - Enabling/Disabling the Caches +1

    • Cortex-A9
    • Cache
    • Memory Management Unit (MMU)
    • Cortex-A
    8661 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex-M7 VFMA usage 0

    • Cortex-M7
    • Cortex-M
    5869 views
    3 replies
    Latest over 7 years ago
    by Carl Williamson Arm Employee Badge
  • Suggested Answer

    what situation will the FPCA in Cortex-M4 change? 0

    • Cortex-M
    • Cortex-M4
    3784 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Semihosting in DS-5 +1

    • Cortex-M7
    • DS-5 Development Studio
    • Cortex-M
    3218 views
    2 replies
    Latest over 7 years ago
    by Wilfrand
  • Answered

    L1 data cache and unified cache disabled in AMP mode for Cortex-a7 +1

    • Cortex-A
    • Cortex-A7
    7802 views
    6 replies
    Latest over 7 years ago
    by Ashwin
  • Answered

    ARM cortext A53 Physical Address Flush +1

    • Cortex-A53
    • AArch64
    • Cortex-A
    • AArch32
    10863 views
    7 replies
    Latest over 7 years ago
    by MarekBykowski
  • Answered

    SMC not going into EL3 +1

    • Cortex-A53
    • Cortex-A
    17064 views
    16 replies
    Latest over 7 years ago
    by yaron alterman
  • Not Answered

    Right way to jump to New Vector Table without Reset 0

    • Cortex-R
    6438 views
    0 replies
    Started over 7 years ago
    by ZXCFD
  • Answered

    Instruction format in documentation ARM-v7-A +1

    • Armv7-A
    6213 views
    3 replies
    Latest over 7 years ago
    by zhangxinxin
  • Suggested Answer

    M4 Assembly - Set Enable also enables the Clear Enable Interrupt Register 0

    • Armv7-M
    • Cortex-M
    • Cortex-M4
    9338 views
    6 replies
    Latest over 7 years ago
    by marcusob
  • Answered

    RTX Windows Simulation - CMSIS Windows Support +1

    • Cortex-M
    • CMSIS
    8122 views
    3 replies
    Latest over 7 years ago
    by Jason Andrews Arm Employee Badge
  • Answered

    Cannot init heap using scatter file and C++ startup (Cortex-M4) +1

    • Cortex-M
    • C
    • Cortex-M4
    5451 views
    3 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
<>
Topics being discussed in this forum
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