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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3594 Questions
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  • Answered

    Cortex-A9-PL310 AXI connection +1

    • Cortex-A9
    • AXI
    • Cortex-A
    5422 views
    2 replies
    Latest over 10 years ago
    by Luke
  • Answered

    Event counters take differing number of cycles +1

    • Cortex-A
    • Cortex-A8
    5787 views
    2 replies
    Latest over 10 years ago
    by dan sullivan
  • Answered

    How to bring secondary CPU1 on ARM v7 0

    • Armv7
    • Cortex-A
    9680 views
    6 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Cortex M3 - Literal-pool vs MOVW-MOVT when cache is present 0

    • Cortex-M3
    • Cache
    • Cortex-M
    14363 views
    9 replies
    Latest over 10 years ago
    by Remi DUCLOS
  • Answered

    Aarch32 app performance on ARMv8a device +1

    • Cortex-A57
    • Armv8
    • Cortex-A
    9653 views
    3 replies
    Latest over 10 years ago
    by Sreenath P V
  • Answered

    LPC1768 - Network-on-Chip 0

    • Cortex-M
    7044 views
    6 replies
    Latest over 10 years ago
    by Jens Bauer
  • Not Answered

    AMBA AHB SLAVE MULTIPLE SPLIT RESPONSES TO SINGLE MASTER 0

    • AMBA
    • AHB
    9091 views
    6 replies
    Latest over 10 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Clean Whole Cache on Cortex-A9 0

    • Cortex-A9
    • Cache
    • Cortex-A
    12357 views
    8 replies
    Latest over 10 years ago
    by John
  • Answered

    How to put codes into ITCM? 0

    • Cortex-M7
    • Cortex-M
    8101 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    ARMv8-A:TrustZone and MMU 0

    • AArch64
    • Armv8-A
    • TrustZone
    7581 views
    3 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Cortex-M3: Is erratum 538714 missing in current Errata Notice (v2 / 2014)? +1

    3247 views
    3 replies
    Latest over 10 years ago
    by J K
  • Answered

    Cortex-M3: Are "Errata Notice" and "Software developers Errata Notice" the same? 0

    • Cortex-M3
    • Cortex-M
    3800 views
    2 replies
    Latest over 10 years ago
    by J K
  • Not Answered

    How to handle SCU at runtime on Cortex-A9 0

    • Cortex-A9
    • Cortex-A
    7638 views
    4 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    clock configuration of xmc4100 +1

    • Cortex-M
    • Cortex-M4
    4089 views
    1 reply
    Latest over 10 years ago
    by Jens Bauer
  • Not Answered

    Question on clock gating for AHB -lite bus matrix for CM4 based system 0

    • AHB-Lite
    • Cortex-M
    • Cortex-M4
    4804 views
    3 replies
    Latest over 10 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Concurrent Interrupts +1

    • Cortex-M0
    • Armv6-M
    • Cortex-M
    4153 views
    3 replies
    Latest over 10 years ago
    by Michael
  • Answered

    What is real application of Exclusive access in AXI +1

    • AXI
    • Cortex-A
    21637 views
    2 replies
    Latest over 10 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    How many clock cycles do SVC/PUSH/POP/SRS/RFE insturctions take to execute on Cortex-A8 processor? 0

    • Cortex-A
    • Cortex-A8
    9766 views
    1 reply
    Latest over 10 years ago
    by Matt Sealey Arm Employee Badge
  • Answered

    Suggestion on suitable arm processor +1

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    19174 views
    23 replies
    Latest over 10 years ago
    by Ma Seet Ting
  • Answered

    Question - 0

    • Cortex-A9
    • Cortex-A15
    • Cortex-A
    6435 views
    5 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
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  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
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  • Cortex-A8
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