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On "ARM Cortex -A Series Programmer’s Guide" , a piece of code is followed:
...
@ Invalidate TLB
MCR p15, 0, r1, c8, c7, 0
@ Branch Prediction Enable
MOV r1, #0
MRC p15, 0, r1, c1, c0, 0 @ Read Control Register configuration data
ORR r1, r1, #(0x1 << 11) @ Global BP Enable bit
MCR p15, 0, r1, c1, c0, 0 @ Write Control Register configuration data
Does the statement "MOV r1, #0" have any special intention? The value of r1 will be replaced by the next MRC instruction. Whether can the statement "MOV r1, #0" be deleted?
Can anyone help?
Thanks,
Feng
Hello,
Thanks!!
I double checked the old ARM document, compiled your code and got the same results as yours. Thank you!
Best regards,
Wang Feng