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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3593 Questions
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  • Answered

    ARM Cortex A9 - Enabling/Disabling the Caches +1

    • Cortex-A9
    • Cache
    • Memory Management Unit (MMU)
    • Cortex-A
    8695 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex-M7 VFMA usage 0

    • Cortex-M7
    • Cortex-M
    5962 views
    3 replies
    Latest over 7 years ago
    by Carl Williamson Arm Employee Badge
  • Suggested Answer

    what situation will the FPCA in Cortex-M4 change? 0

    • Cortex-M
    • Cortex-M4
    3813 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Semihosting in DS-5 +1

    • Cortex-M7
    • DS-5 Development Studio
    • Cortex-M
    3246 views
    2 replies
    Latest over 7 years ago
    by Wilfrand
  • Answered

    L1 data cache and unified cache disabled in AMP mode for Cortex-a7 +1

    • Cortex-A
    • Cortex-A7
    7868 views
    6 replies
    Latest over 7 years ago
    by Ashwin
  • Answered

    ARM cortext A53 Physical Address Flush +1

    • Cortex-A53
    • AArch64
    • Cortex-A
    • AArch32
    10933 views
    7 replies
    Latest over 7 years ago
    by MarekBykowski
  • Answered

    SMC not going into EL3 +1

    • Cortex-A53
    • Cortex-A
    17209 views
    16 replies
    Latest over 7 years ago
    by yaron alterman
  • Not Answered

    Right way to jump to New Vector Table without Reset 0

    • Cortex-R
    6459 views
    0 replies
    Started over 7 years ago
    by ZXCFD
  • Answered

    Instruction format in documentation ARM-v7-A +1

    • Armv7-A
    6237 views
    3 replies
    Latest over 7 years ago
    by zhangxinxin
  • Suggested Answer

    M4 Assembly - Set Enable also enables the Clear Enable Interrupt Register 0

    • Armv7-M
    • Cortex-M
    • Cortex-M4
    9441 views
    6 replies
    Latest over 7 years ago
    by marcusob
  • Answered

    RTX Windows Simulation - CMSIS Windows Support +1

    • Cortex-M
    • CMSIS
    8168 views
    3 replies
    Latest over 7 years ago
    by Jason Andrews Arm Employee Badge
  • Answered

    Cannot init heap using scatter file and C++ startup (Cortex-M4) +1

    • Cortex-M
    • C
    • Cortex-M4
    5497 views
    3 replies
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Is SVC pendable on cortex-m? +1

    • Armv7-M
    • Cortex-M
    9473 views
    6 replies
    Latest over 7 years ago
    by loquat3
  • Answered

    [Cortex-A53] STP instruction stores out of the specified memory +1

    • Cortex-A53
    • Cortex-A
    • Armv8.1-A
    7533 views
    4 replies
    Latest over 7 years ago
    by Emmy0
  • Answered

    Cortex M3, PrimeCell uDMAC bus arbitration 0

    • Cortex-M3
    • Cortex-M
    3178 views
    2 replies
    Latest over 7 years ago
    by acoad
  • Answered

    How to start boot up in the region of 0x1000 memory address (Cortex-M0) 0

    • Cortex-M0
    • Cortex-M
    7262 views
    5 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    An algorithm on a M7 is slower than on M4 - why? 0

    • Cortex-M7
    • Cortex-M
    • Cortex-M4
    12563 views
    11 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Suggested Answer

    Cortex M4 - Returning from Interrupt 0

    • Cortex-M
    • Cortex-M4
    13364 views
    5 replies
    Latest over 7 years ago
    by JBD
  • Answered

    Does Cortex-M3/M4 continue with burst in response to ERROR? 0

    • AMBA
    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    • AHB
    3870 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Launching bare-metal firmware at EL2 (Hyp) on QEMU with ARM Trusted Firmware? +1

    • Cortex-A57
    • Arm Trusted Firmware
    • AArch64
    • Cortex-A
    9340 views
    1 reply
    Latest over 7 years ago
    by 42Bastian Schick
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Topics being discussed in this forum
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  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
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  • AXI
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  • Cortex-A7
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  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone