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Folks,
I am trying to run linux 'perf' on a new board with 2 ARM cortex-a9 CPUs. After compiling the kernel to include perf tool, i run 'perf stat true' and it returns valid stats. But when I run 'perf record' to profile my program, it doesn't record any samples. Also, running the following command gives me an error.
# perf record -e cycles:u,cycles:k,instructions:u,instructions:k -p 1 Error:PMU Hardware doesn't support sampling/overflow-interrupts.
This makes me suspect that PMU is not initialized. Can someone suggest me how to go about this issue?
# perf stat true Performance counter stats for 'true': 1.101860 task-clock (msec) # 0.523 CPUs utilized 0 context-switches # 0.000 K/sec 0 cpu-migrations # 0.000 K/sec 22 page-faults # 0.020 M/sec 1094830 cycles # 0.994 GHz 314416 instructions # 0.29 insn per cycle 29305 branches # 26.596 M/sec 16522 branch-misses # 56.38% of all branches 0.002106000 seconds time elapsed
Maybe it is really like the error says. Did you check the HW manual for your SoC if the PMU-Interrupts are implemented?
Thanks for your reply. Isn't PMU part of ARM CPU itself? I read my board's tech manual and the only mention of PMU redirects to Cortex-A9 CPU (accessible via CP14 interface). This makes me believe that PMU is independent of the SoC.
The manual states that the PMU (in whole) is optional. But nothing about overflow-interrupt being optional.So maybe it is a kernel configuration issue?
Hi wagner,
It could be that your SoC has indeed the PMUs hardware, but without a functional interrupt.
You might want to check in /proc/interrupts if you see a line related to PMUs in there, and if you see it indeed trigger on all cores, similar to:
53: 255 77 704 208 f03f0100.interrupt-controller 17 Level arm-pmu
Best regards,
Vincent.
Nope, I don't see any entry related to PMU in /proc/interrupts.
I have enabled almost all the kernel configs I could think of related to PMU and Profilign.
One question though: While browsing the forum here, I found this thread "How to configure Cortex-A57 PMU". Can you please tell me what does it mean by configuring the PMU? Do I also need to perform the similar steps?
Then it might be that the PMU interrupt is not implemented in your SoC, but it is a bit early to be sure as it could also be not supported by your software.
You might want to look in your dmesg for a line similar to:
[ 1.714690] hw perfevents: enabled with armv8_cortex_a72 PMU driver, 7 counters available
You might want to have a look at your SoC dts for mentions of the PMU interrupt.
For example, this is how it is described for the Juno SoC:
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/arm/juno-r2.dts?h=v4.17-rc5#n204
It will be easier to help if you just tell us which SoC you use.
Sure, it's Arria10 based SoC.
I see no PMU interrupt support for Arria10 in mainline kernel yet, sorry.
Although, there is a patch for PMU support in Altera's kernels socfpga-4.15 and socfpga-4.16 here:
https://github.com/altera-opensource/linux-socfpga/commit/34869353774bc6de05291fc6ad50d7f471fa3cd8
It might be worth a try.