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DS-5 connect fail when cortex-r5 is in lock-step mode

Jeffrey_lin

Dear All,

I am using DS-5 to debug Zynq UltraScale+ MPSoC.

Evevrything goes well, but when the Cortex-r5 is run in lock-step mode, DS-5 cannot be connected(Cannot connect to A53 or R5).

When the r5 is in splt mode or r5 is powerd off, DS-5 work well. 

Parents
  • 0 Arm Employee Badge in reply to Jeffrey_lin

    Hi again ,

    Thanks for the update and the confirmation of RPU_GLBL_CNTL value.

    Using a Xilinx ZCU102 dev board and booting from SDCard with the A53_0 performing the boot, I am able to set up the R5's to be in lockstep mode with a DS-5 pre-connect script.

    I can subsequently connect with DS-5 v5.29.2 and a DSTREAM unit (running 4.34.0 build 13 firmware as included with DS-5).

    Please see the screenshot below :

    R5_0 connected on ZCU102 in lockstep

    Because the R5's are powered down prior to my connection, I used a script to set the R5's up to be in lockstep mode. As hopefully can be seen above, I can connect to R5_0 OK, and then if I also try connecting to R5_1 then as expected, it is not available and is being indicated as powered-down by DS-5.

    So something is different about the way our targets are being initialised here I feel.

    To investigate this further I will have to create an sdcard with the Cortex-R5 being the boot processor, but this might take me some little time as I do not have the required tools setup at the moment, it would be sometime next week before I could make much progress I'm afraid.

    In the meantime, perhaps there is something different about the CPUs have been initialised with my script and the Xilinx tools ??

    Also, could you just clarify which development board you are using please (weblink, part number...) ?

    Regards,

    Stuart

Reply
  • 0 Arm Employee Badge in reply to Jeffrey_lin

    Hi again ,

    Thanks for the update and the confirmation of RPU_GLBL_CNTL value.

    Using a Xilinx ZCU102 dev board and booting from SDCard with the A53_0 performing the boot, I am able to set up the R5's to be in lockstep mode with a DS-5 pre-connect script.

    I can subsequently connect with DS-5 v5.29.2 and a DSTREAM unit (running 4.34.0 build 13 firmware as included with DS-5).

    Please see the screenshot below :

    R5_0 connected on ZCU102 in lockstep

    Because the R5's are powered down prior to my connection, I used a script to set the R5's up to be in lockstep mode. As hopefully can be seen above, I can connect to R5_0 OK, and then if I also try connecting to R5_1 then as expected, it is not available and is being indicated as powered-down by DS-5.

    So something is different about the way our targets are being initialised here I feel.

    To investigate this further I will have to create an sdcard with the Cortex-R5 being the boot processor, but this might take me some little time as I do not have the required tools setup at the moment, it would be sometime next week before I could make much progress I'm afraid.

    In the meantime, perhaps there is something different about the CPUs have been initialised with my script and the Xilinx tools ??

    Also, could you just clarify which development board you are using please (weblink, part number...) ?

    Regards,

    Stuart

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