Dear All,
I am using DS-5 to debug Zynq UltraScale+ MPSoC.
Evevrything goes well, but when the Cortex-r5 is run in lock-step mode, DS-5 cannot be connected(Cannot connect to A53 or R5).
When the r5 is in splt mode or r5 is powerd off, DS-5 work well.
Hi,
Thanks for your support.
My development board is our own creation, and is based on Xilinx XCZU6CG-FFVB1156E SoC (https://www.digikey.com/product-detail/en/xilinx-inc/XCZU6CG-2FFVB1156E/XCZU6CG-2FFVB1156E-ND/6817801).