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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3582 Questions
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  • Not Answered

    Usage of IT instruction in ARM T32. 0

    • T32 (Thumb)
    3323 views
    2 replies
    Latest over 7 years ago
    by xinxin
  • Answered

    Is there any relationship between BOOT and REMAP in design kit? +1

    • CMSDK
    • Cortex-M
    7571 views
    4 replies
    Latest over 7 years ago
    by ele
  • Answered

    ARMv7 how a program can check whether it is in secure state or not ? 0

    • Raspberry Pi
    • Armv7-A
    6533 views
    3 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Answered

    Different performance in HYP and SVC mode ARMv7A? +1

    • big.LITTLE
    • Armv7-A
    • Cortex-A15
    • Cortex-A
    • Cortex-A7
    9911 views
    5 replies
    Latest over 7 years ago
    by ivanpavic
  • Answered

    Arm v7 SP in secure and non secure mode : shared or not ? 0

    • Armv7
    5386 views
    4 replies
    Latest over 7 years ago
    by AALLeeXX
  • Answered

    Explanation of cycles on pre and post index-addressing in case of Load and Store instructions. +1

    • Cortex-M
    • Cortex-M4
    5465 views
    2 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Not Answered

    Cortex A7 - Boot from SPI NOR vs Execution In Place (XIP) 0

    • Cortex-A
    • Cortex-A7
    7282 views
    4 replies
    Latest over 7 years ago
    by 42Bastian Schick
  • Not Answered

    Programming FPU for Secure and Non Secure Use 0

    • iOS
    • TrustZone
    • Armv8-M
    12419 views
    5 replies
    Latest over 7 years ago
    by kappajacko
  • Answered

    Is offset of 30 in load and store instructions shows an exceptional case? +1

    • Cortex-M
    • Cortex-M4
    2592 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Interface Cortex M4 and PSRAM with different power supply voltage +1

    • Cortex-M
    • Cortex-M4
    3142 views
    1 reply
    Latest over 7 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    shareability attribute for armv8 cortex a-53 0

    • Cortex-A53
    • Cache coherency
    • Cache
    • Cortex-A
    13347 views
    6 replies
    Latest over 7 years ago
    by MarekBykowski
  • Answered

    L2 Cache(Pl310) initialisation sequence +1

    • Cortex-A9
    • U-Boot
    • Cache
    • Memory Management Unit (MMU)
    • Cortex-A
    • L2
    7184 views
    4 replies
    Latest over 7 years ago
    by MarekBykowski
  • Answered

    Cortex-A15 MPCore: How to Enable Monitor Debug Mode 0

    • Cortex-A15
    • Cortex-A
    5435 views
    2 replies
    Latest over 7 years ago
    by Melih Bayraker
  • Answered

    Store the value of PC to Memory address +1

    • Cortex-M3
    • Thumb
    • Cortex-M
    • Arm Assembly Language (ASM)
    11715 views
    4 replies
    Latest over 7 years ago
    by Vanhealsing
  • Answered

    Cortex-M1 on Actel - how to start? +1

    • Cortex-M1
    • Cortex-M
    • AHB
    7479 views
    3 replies
    Latest over 7 years ago
    by salman sheikh
  • Answered

    Which is better of thees CPUs +1

    • Cortex-A53
    • Cortex-A9
    • Cortex-A
    • Cortex-A7
    14368 views
    3 replies
    Latest over 7 years ago
    by Vanhealsing
  • Suggested Answer

    Hard Faults and MemManage Faults in Cortex m3/m4 0

    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    6041 views
    1 reply
    Latest over 7 years ago
    by uditknit
  • Answered

    interrupt distribution on A53 processor +1

    • Cortex-A53
    • Cortex-A
    6554 views
    1 reply
    Latest over 7 years ago
    by RCReddy
  • Answered

    I am looking for intro material ARMv7 0

    • Armv7
    • Cortex-A
    • Cortex-A8
    7117 views
    5 replies
    Latest over 7 years ago
    by mkolakov
  • Answered

    SMC call on ARM64 0

    • AArch64
    • Arm64
    7079 views
    2 replies
    Latest over 7 years ago
    by uditknit
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Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
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  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone