I need the ARMv6-M Architecture Reference Manual and ebrising abaut the cortex m0
Hi sergiogv,
You could download the latest version from ARM Information Center: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0419c/index.html
By the way, the book "The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors, 2nd Edition" provides also many important information and it is easier to read.
Jeremy
I realize that this is an old question but I do not find the design of ARM's on-line documents convenient for use in assembly language programming. Hypertext is all well and good but however many monitors a developer computer might have, having to use one just for reference is one to many. Instead, I printed & bound this:http://www.rowleydownload.co.uk/arm/packages/targets/SAM_D/CMSIS/Documents/dui0662a_cortex_m0p_r0p0_dgug.pdfIf people wonder why people would choose to use assembly language, it's worth noting that any code using the main stack pointer (or any code that will not experience an interrupt e.g. highest-level interrupt) then you can push the LR & store the SP to RAM so you can use 15 of the 16 'general purpose registers'. It is worth noting that some of the small caches seen on M0(+) CPUs is direct, not associated i.e. 8 lines of 8 bytes. Code within those caches does not proceed using the IP. In this small set of examples, you can use R15 as well. That applies to some M0 and some M0+ cores.If you compile a higher level language, none of them will use the 2-register trick. The 3 register trick requires you to ensure it works on the reference design. Atmel were surprisingly helpful on the matter. While it is impossible for an instruction to be completed on every cycle, you can ensure that the bus is used 100% of the time. Since bus bandwidth was the reason for the ARM1, a small cache on the M0 @ 48MHz makes a BIG difference. I mean 128-kbs/s mono MP3 to 300-kbit/s stereo.