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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3584 Questions
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  • Answered

    Cortex-A9/GIC: de-activate an active interrupt 0

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    5372 views
    2 replies
    Latest over 10 years ago
    by 42Bastian
  • Answered

    Issue about Cortex-A9 Dhrystone performance 0

    • Cortex-A9
    • Cortex-A
    15627 views
    12 replies
    Latest over 10 years ago
    by anoop
  • Answered

    MRS/MSR (Banked register) 0

    • Armv7-A
    • Armv7-R
    • Cortex-A
    • Cortex-A7
    8220 views
    4 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Cortex-A72 and Cortex-A5x series boards 0

    • Cortex-A72
    • Cortex-A53
    • Cortex-A57
    • Cortex-A
    9374 views
    4 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    Problem with storing data instruction STR (ASM) 0

    • Cortex-M
    35472 views
    16 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    What are hints? 0

    • Armv7-A
    • Armv7-R
    6168 views
    3 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    What will be happened if I insert a store instruction behind a LDREX instruction for accessing the same address? 0

    • Armv8-A
    • Armv8-R
    2991 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How to run an ARM 32bit binary on Juno Board in Linux and Android ? 0

    • Cortex-A9
    • Cortex-A
    • Linux
    6290 views
    4 replies
    Latest over 10 years ago
    by Mingting
  • Not Answered

    system requirements 0

    • Armv7-A
    • Cortex-M7
    • Armv7-M
    • Cortex-A
    • Cortex-A7
    • Cortex-M
    3171 views
    2 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    The merit of data cache cleaning +1

    • Armv7-A
    • Cortex-A9
    • Cache
    • Cortex-A
    8349 views
    5 replies
    Latest over 10 years ago
    by Henry Choi
  • Answered

    Why the different encodings? 0

    • Armv7-A
    • Thumb
    13363 views
    8 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    os supporting sd card read and write +1

    • Arm7
    • Linux
    5601 views
    4 replies
    Latest over 10 years ago
    by Alban Rampon
  • Answered

    AMBA3 AXI - Exclusive access 0

    • AMBA
    • AMBA 3
    • AXI3
    • AXI
    13318 views
    10 replies
    Latest over 10 years ago
    by Cao Phi Ho
  • Answered

    arm cortex a9 c++ support +1

    • Cortex-A9
    • Cortex-A
    16909 views
    15 replies
    Latest over 10 years ago
    by Christopher Seidl Arm Employee Badge
  • Answered

    CPUID information about ARMv8 core 0

    • Cortex-A53
    • Cortex-A57
    • Cortex-A
    7576 views
    2 replies
    Latest over 10 years ago
    by ocean
  • Answered

    How SMMU will override the memory attribute of the master which have MMU/MPU embedded? 0

    • Cortex-A53
    • Cortex-A
    6628 views
    3 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    AMBA3 AXI Relationship Between Channels 0

    • AMBA
    • AXI3
    • AXI
    4333 views
    2 replies
    Latest over 10 years ago
    by Cao Phi Ho
  • Answered

    no C bit in SMMU_CBn_SCTLR 0

    • Armv8-A
    • Armv8-R
    • Armv8-M
    • C
    4533 views
    2 replies
    Latest over 10 years ago
    by Jerry
  • Answered

    System Bus in ARM Cortex-M4 +1

    • Architecture
    • Microcontroller (MCU)
    • Cortex-M
    12502 views
    4 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Re-entrant IRQ handler for A53 0

    • Cortex-A53
    • Cortex-A
    4207 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
<>
Topics being discussed in this forum
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