Hello all,
I was debugging an imprecise external abort in one of our product based on i.MX6q and came across a register - Auxiliary Data Fault Status Register
readable and writable by the following instructions -
MRC p15,0,<Rt>,c5,c1,0
MRC p15,0,<Rt>,c5,c1,1
The ARM v7 Architecture reference manual says that the values contained in it are implementation defined. So does the cortex-a9 manual.
Could you please throw some insight on what "Implementation Defined" means? My understanding is, it depends on the semiconductor
vendor, basically how things are hardwired at the SoC level. Could you please provide some details and correct me if I am wrong.
Thanks and best regards,
Niranjan Dighe