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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3624 Questions
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  • Answered

    Cortex A53 : Cache policy setting 0

    • Cortex-A53
    • Cache
    • Cortex-A
    8928 views
    4 replies
    Latest over 8 years ago
    by MarekBykowski
  • Suggested Answer

    Why linux set memory as inner shareable in multi-cluster ARMv8 cores? 0

    • Cortex-A53
    • Cortex-A57
    • Cache coherency
    • Armv8-A
    • Cortex-A
    13957 views
    7 replies
    Latest over 8 years ago
    by thomas_cp
  • Answered

    MFLOPS of M4F 0

    • Cortex-M
    • Cortex-M4
    8003 views
    2 replies
    Latest over 8 years ago
    by Timm Hinrichs
  • Answered

    How to interface TFT display with lpc1768 0

    • Cortex-M3
    • Cortex-M
    11534 views
    8 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Bit scan Instruction ARM cortex R4 +1

    • Cortex-R
    • Cortex-R4
    19751 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    SOFT Reset hangs sometimes in ARM926ej 0

    • Arm9
    • arm926ej-s
    • Interrupt
    11715 views
    8 replies
    Latest over 8 years ago
    by Krishna K
  • Suggested Answer

    Transaction cost between secure world and normal world 0

    • TrustZone
    • Armv8-M
    8117 views
    2 replies
    Latest over 8 years ago
    by daith
  • Answered

    what happens when same interrupt comes to much fast on IRQ pin of ARM926ej-s? +1

    • Cortex-M
    4702 views
    2 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    How to implement to write firmware by JTAG within CM3 design kit? 0

    • CMSDK
    • Cortex-M
    10025 views
    8 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Memory read error at 0xF8000008: Cannot read write-only register. +1

    • Cortex-A9
    • Cortex-A
    7630 views
    3 replies
    Latest over 8 years ago
    by Vanhealsing
  • Answered

    ARMv7: How to set SP in secure and non secure mode ? 0

    • Raspberry Pi
    • Armv7-A
    10830 views
    4 replies
    Latest over 8 years ago
    by AALLeeXX
  • Answered

    ARMv8.1-A: Access Flag managed by Hardware 0

    • Armv8.1-A
    7270 views
    4 replies
    Latest over 8 years ago
    by Vincent Siles
  • Answered

    MPU is not triggering MemFault or HardFault +1

    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    9318 views
    5 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    luajit compilation on aarch64 +1

    • AArch64
    8434 views
    2 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    How to start accessing the flash rom on Cortex-M3 design kit by JTAG? 0

    • Cortex-M3
    • Cortex-M
    3889 views
    2 replies
    Latest over 8 years ago
    by ele
  • Answered

    Interrupt switching during Late Arrival- CortexM3 +1

    • Cortex-M3
    • Cortex-M
    5067 views
    3 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    How to execute 32-bit ARM assembly in a 64-bit environment +1

    • Raspberry Pi
    • Cortex-A
    10641 views
    2 replies
    Latest over 8 years ago
    by sandrosart
  • Answered

    is there any simulator for ARM CORTEX A series +1

    • Cortex-A
    5997 views
    3 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    How do I implement the cortex M3 Boot ROM code? +1

    • Cortex-M3
    • Cortex-M
    11331 views
    4 replies
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    CP15SDISABLE +1

    • Raspberry Pi
    • Cortex-A
    6593 views
    4 replies
    Latest over 8 years ago
    by AALLeeXX
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