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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3593 Questions
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  • Not Answered

    Can code compiled for armv7-m run as it is on armv8-m? 0

    4232 views
    2 replies
    Latest over 5 years ago
    by Muhammad Usama Anjum
  • Not Answered

    How to write values ​​from secure code to non-secure memory. 0

    • TrustZone for Armv8-M
    10698 views
    1 reply
    Latest over 5 years ago
    by Uma Ramalingam Arm Employee Badge
  • Not Answered

    Overlapping the execution of VDIV.F32 and SDIV/UDIV 0

    3079 views
    1 reply
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Advantage of Zero register over the cost of implementing it ? +1

    • AArch64
    • Armv8-A
    • Cortex-A
    29220 views
    2 replies
    Latest over 5 years ago
    by Morgan CHANG
  • Answered

    AArch64/GICv3:ICC_SGI1R_EL1: AFF1 0

    • GICv3/v4
    24373 views
    5 replies
    Latest over 5 years ago
    by a.surati
  • Not Answered

    Debugger-based Firmware Test Framework 0

    • Debug Tools and Test Methods
    • Cortex-M
    • Debugger
    5468 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    QEMU GICV2 Virtual Interface Alias 0

    • GICv2
    • QEMU
    22229 views
    1 reply
    Latest over 5 years ago
    by vstehle Arm Employee Badge
  • Not Answered

    CortexM0 Debug - DAP baseaddr, M0 ROM Table and system ROM table 0

    • Cortex-M0
    • CoreSight
    • Debug Access Port (DAP)
    2764 views
    0 replies
    Started over 5 years ago
    by eugch
  • Not Answered

    What is the best location of RTOS ? 0

    8666 views
    0 replies
    Started over 5 years ago
    by EugeneH
  • Not Answered

    When does a Cortex Mx wake up from "wfi" ? Is it configurable? 0

    • Cortex-M
    13218 views
    12 replies
    Latest over 5 years ago
    by d.ry
  • Answered

    Discussion/Question: TrustZone vs Hypervisor +1

    • TrustZone
    • functional safety
    • Hypervisor
    27914 views
    4 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    TrustZone switching worlds +1

    • TrustZone Controllers
    • TrustZone
    23628 views
    5 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Compiling error "system_MKL25Z4.h" file not found despite linker path provided 0

    • Compilation error
    • Cortex-M0+
    8559 views
    8 replies
    Latest over 5 years ago
    by Manuel Chavez
  • Answered

    A35 Power Mode Transitions 0

    22616 views
    3 replies
    Latest over 5 years ago
    by 42Bastian Schick
  • Answered

    Regarding the documentation on the T1 encoding of the MOV instruction on ARMv6-M architecture 0

    • Armv6-M
    • Documentation
    5776 views
    3 replies
    Latest over 5 years ago
    by B. Robertson
  • Answered

    Why does Arm still support short descriptors? +1

    • Armv7-A
    • Armv8-A
    • Memory Management Unit (MMU)
    20967 views
    1 reply
    Latest over 5 years ago
    by Andy Neil
  • Answered

    In Arm v7 mmu, stage2 translation cannot use short descriptors. WHY? +1

    • EL1
    • Armv7-A
    • EL0
    • Memory Management Unit (MMU)
    • Hypervisor
    27944 views
    3 replies
    Latest over 5 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    BURST option in AHB-to-AHB sync-up bridge 0

    21651 views
    2 replies
    Latest over 5 years ago
    by misimovi
  • Answered

    Processor halt in __libc_init_array assembler function 0

    25269 views
    8 replies
    Latest over 5 years ago
    by Andy Neil
  • Suggested Answer

    adc read 0

    • Cortex-M0
    3905 views
    2 replies
    Latest over 5 years ago
    by Andy Neil
<>
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