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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3588 Questions
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  • Answered

    ARM Trusted Firmware, number of cpu cores.. 0

    • Arm Trusted Firmware
    • Armv8-A
    6742 views
    1 reply
    Latest over 10 years ago
    by Peter Rielly Arm Employee Badge
  • Not Answered

    Receiving Data Using the UART CORTEX M0 0

    • Cortex-M0
    • Cortex-M
    24700 views
    18 replies
    Latest over 10 years ago
    by Alejandra
  • Answered

    Write interleaving with Multi-AXI master 0

    • AXI
    • AXI4
    6532 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Reason for having decouple write address, data channels in AXI4 +1

    • AMBA
    • AXI3
    • AXI
    • AXI4
    7719 views
    5 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    how to understand ARMv8 exception level1 secure/non-secure MMU? +1

    • EL1
    • EL3
    • AArch64
    • Armv8-A
    8319 views
    1 reply
    Latest over 10 years ago
    by Peter Rielly Arm Employee Badge
  • Answered

    What is the value of a license of an ARM Cortex-A53 processor? +1

    • Cortex-A53
    • Cortex-A
    7993 views
    3 replies
    Latest over 10 years ago
    by Brad Nemire Arm Employee Badge
  • Answered

    Updated ARMv7-M architecture reference manual for Cortex-M7 ? 0

    • Cortex-M7
    • Armv7-M
    • Cortex-M
    4020 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Are simultaneous accesses to both ITCM and DTCM of Cortex-M7 possible? 0

    • Cortex-M7
    • Cortex-M
    8422 views
    6 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex-A8 performance 0

    • Cortex-M3
    • Cortex-A
    • Cortex-A8
    • Cortex-M
    17584 views
    12 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Does Cortex-A7 have the ability to send a 128-bits exclusive transaction? 0

    • Cortex-A
    • Cortex-A7
    4692 views
    2 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    Understanding ARM NEON instruction 0

    • NEON
    • Cortex-A
    5232 views
    1 reply
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    C Programming and pointer sizes on ARM processors. +1

    • Cache
    • C
    17786 views
    9 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Measuring the time of a world switch 0

    • Cortex-A15
    • Cortex-A
    4932 views
    2 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Question for AXI responce when access error 0

    • AMBA
    • AXI
    11475 views
    4 replies
    Latest over 10 years ago
    by Jun Usami
  • Answered

    Interrupt vector calculation with VTOR. +1

    11756 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    What is better as mutex on Cortex-M4 - Bitband or LDREX/STREX 0

    • Cortex-M
    • Cortex-M4
    9770 views
    7 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex-M0: Execute in RAM after copying from flash 0

    • Cortex-M0
    • Cortex-M
    9787 views
    3 replies
    Latest over 10 years ago
    by wshen
  • Answered

    How long bitfields on which ARM? 0

    • Cortex-M0
    • 32-bit
    • Cortex-M7
    • Cortex-M3
    • Cortex-M
    • Cortex-M4
    10285 views
    6 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex M4 exception return sequence 0

    • Cortex-M
    • C
    • Cortex-M4
    28179 views
    9 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    Is there a way for me to estimate power usage for various ARM cores (Cortex-M0,1,3,4 )? +1

    • Cortex-M
    9280 views
    6 replies
    Latest over 10 years ago
    by Joseph Yiu Arm Employee Badge
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Topics being discussed in this forum
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