Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums
Architectures and Processors forum
  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3586 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • Answered

    Square root calculation results. FPU logic of A15 and A7 CPUs on Odroid-XU3 board. +1

    • Cortex-A15
    • Cortex-A7
    5783 views
    2 replies
    Latest over 8 years ago
    by 42Bastian Schick
  • Answered

    Starting with Arm assembly to obtain machine code +1

    • Armv8
    • Arm Assembly Language (ASM)
    6431 views
    1 reply
    Latest over 8 years ago
    by Myy
  • Answered

    RIT Interrupt in Keil uVision +1

    3761 views
    1 reply
    Latest over 8 years ago
    by dameash
  • Answered

    ARMV8 48-vs-52-bit mode +1

    4073 views
    1 reply
    Latest over 8 years ago
    by daith
  • Answered

    Why is there no vector integer divide in SIMD instructions ? +1

    • SIMD and Vector Processing Instructions
    11429 views
    3 replies
    Latest over 8 years ago
    by daith
  • Answered

    Cortex M0+ on teensy LC, USB not working. +1

    2944 views
    1 reply
    Latest over 8 years ago
    by yikestone
  • Answered

    What works as a data memory barrier? +1

    6854 views
    4 replies
    Latest over 8 years ago
    by kevinlayer
  • Answered

    Why is string defined with half '0's? +1

    • Cortex-M4
    3842 views
    1 reply
    Latest over 8 years ago
    by Simon Craske Arm Employee Badge
  • Answered

    Cortex A53 Out of Order? +1

    • Cortex-A53
    • Cortex-A
    7965 views
    3 replies
    Latest over 8 years ago
    by pizza
  • Answered

    ARM Processor board and Programming +1

    4229 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Cortex M0+ what means "optionally shifted" at some instructions like EOR (register) +1

    3795 views
    2 replies
    Latest over 8 years ago
    by Volker Kugler
  • Answered

    Speculative Branching. +1

    • Cortex-M3
    8041 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
  • Answered

    Security State transitions - Processor Mode +2

    • ANSI
    • CHI
    • Security
    • TrustZone
    • Armv8-M
    34906 views
    11 replies
    Latest over 8 years ago
    by raghu.ncstate
  • Answered

    ARM v7 Instruction Set Architecture Opcode Code +1

    • Armv7
    • Armv7-A
    • Arm Assembly Language (ASM)
    • AArch32
    23709 views
    4 replies
    Latest over 8 years ago
    by meromeo
  • Answered

    Arm1176 processor is getting hang, when I use Multiple register data transfer instructions, my Stack pointer is in DDR +1

    6776 views
    7 replies
    Latest over 8 years ago
    by daith
  • Answered

    Security principles for TrustZone for ARMv8-M - example slide 22 +1

    • Security
    • TrustZone
    • Armv8-M
    • Interrupt
    • Memory
    9177 views
    2 replies
    Latest over 8 years ago
    by raghu.ncstate
  • Answered

    Development with ARMv8a debug (and watchpoint) registers. +1

    4875 views
    1 reply
    Latest over 8 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How to know if the processor is in EL0 state on armv8? +2

    • ARMv8 Exception Model
    • Armv8
    12439 views
    6 replies
    Latest over 8 years ago
    by Ajeesh
  • Answered

    Porting code From Cortex-A9 to Cortex-R7 0

    • Armv7
    • Cortex-A9
    • Arm Assembly Language (ASM)
    • Cortex-R7
    5433 views
    3 replies
    Latest over 8 years ago
    by Ajeesh
  • Answered

    Cortex M4, guidance for an i/o assembly tuition +1

    3697 views
    1 reply
    Latest over 8 years ago
    by Joseph Yiu Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone