Hello All,I had a couple of clarifications w.r.t the ARMv8 docs and Virtual IRQ/FIQ exceptions in conjunction with HCR.{IMO,FMO} bits and interrupt routing.A) Does this mechanism require a GIC or can it function without one?B) I am experimenting with a hypervisor and a custom guest and here is a rundown of what I am wanting to accomplish: 1 HYP mode: set HCR.IMO=1 and start gues
2. guest SVC mode: setup VBAR and IRQ/FIQ vectors and enable timer/interrupts
3. HYP mode: IRQ handler: gets control and sets HCR.VI=1
4. guest IRQ mode: IRQ handler gets control and calls into HYP mode via hypercall-0
5. HYP mode: hypercall handler 0: set HCR.VI=0 and resume guest1, 2 and 3 above work. However, for some reason 4 is not triggered but I keep looping at 3 on the same guest PC in SVC mode just afterinterrupts are enabled.My understanding is that setting the HCR.VI should trigger the guest IRQ handler, but it is not doing so in my case.Any insights?
Happy to help.
When HCR.IMO=1 and executing at PL1 (svc, irq etc modes) physical irqs are unmaskable and will always bounce you to hyp mode.
In this config the cpsr.irq mask @pl1 only affects virtual irqs.