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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3635 Questions
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  • Answered

    Virtual Timers in ARM V8 +1

    • Hypervisor
    6144 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Virtual Interrupts and usage in ARM V8 +1

    • EL1
    • EL0
    • Generic Interrupt Controller
    5074 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    Self Hosted Debug +1

    • Linux
    5258 views
    2 replies
    Latest over 10 years ago
    by techguyz
  • Answered

    Why in A64 the coprocessor is removed? 0

    • AArch64
    • NEON
    • AArch32
    7936 views
    3 replies
    Latest over 10 years ago
    by Mark Nicholson Arm Employee Badge
  • Answered

    Cortex M4 Unaligned access with STR single word access 0

    • Cortex-M
    • Cortex-M4
    10509 views
    7 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    A TCM problem 0

    • Arm11
    11190 views
    7 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    How to trap Guest data aborts +1

    • EL1
    • EL2
    • Generic Interrupt Controller
    • Linux
    10521 views
    8 replies
    Latest over 10 years ago
    by armdev
  • Answered

    How to get Cortex m3 soft core +1

    • Cortex-M0
    • Cortex-M3
    • Cortex-M
    4261 views
    3 replies
    Latest over 10 years ago
    by Sadanand Gulwadi
  • Not Answered

    Can an ACE master have multiple write channels ? 0

    • ACE
    • AXI4
    3230 views
    2 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    ARM SPEC score. +1

    • Cortex-A15
    • Cortex-A
    5222 views
    2 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Why does Cortex-R only support most two cores? 0

    • Cortex-R
    • Cortex-R5
    • Cortex-A
    • Cortex-R7
    4725 views
    2 replies
    Latest over 10 years ago
    by Jon Taylor Arm Employee Badge
  • Answered

    I want to know how to invalidate or clean to cache only used secure-world 0

    • big.LITTLE
    • Cache
    • Armv8-A
    11768 views
    6 replies
    Latest over 10 years ago
    by 박주병
  • Answered

    Thirdparty RTOS support for ARM V8 +1

    • Armv8-A
    • Armv8-R
    3495 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Programming ARMv8 memory mapped registers +1

    • APB
    7145 views
    5 replies
    Latest over 10 years ago
    by Ravinder
  • Answered

    Non aligned access in arm v7 going into exception 0

    • Cache
    9545 views
    3 replies
    Latest over 10 years ago
    by David Wang Arm Employee Badge
  • Answered

    ARM Cortex-A7 generic timer 0

    • Cortex-A
    • Cortex-A7
    11759 views
    4 replies
    Latest over 10 years ago
    by hostia
  • Answered

    Question about a code snippet on ARM, Thumb state change 0

    • Thumb
    9897 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Is the 'S' necessary in the asm code? 0

    • Cortex-A
    • Cortex-A8
    • C
    5680 views
    5 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    What does it mean 'IT can be omitted'? +1

    • Thumb
    • Cortex-A
    6125 views
    4 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Not Answered

    What type of ARM is used in 10-Gb Ethernet chip? 0

    • Cortex-A57
    • Cortex-A15
    • Cortex-A
    6402 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
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