For the view of architecture, why the coprocessor is removed for A64 instruction set?
What Ash says...
Hardly anyone (including those of us in ARM) knows what MRC p15,0,<Rt>,c1,c0,2 does, without relying on comments in the code or checking the docs. The new System Register mnemonics just make life easier, because you can guess what they do. However "under the hood" they are still basically co-processor ops.