Hello guys,Im trying to use the timer registers of my ARM Cortex M0 while using my pga970EVM. Unfortionally there aren't any files/Commands refering to using the 3 registers SYST_CSR, SYST_RVR, SYST_CVR. I figured out how these registers are working quite easily: SYST_CVR is set to the Reload Value which is defined by SYST_RVR. When SYST_CSR is enabled, SYST_CVR gets lowered periodically and when reaching 0 its Value is reset to the reload Value. Normally there should be a function which is called as soon as the Current Value Register hits 0 but there is none in my generic firmware. The link provides the information I have on these registers.
Cortex-M0 Devices Generic User Guide (arm.com)Do I have to write a function my own? If so how can i do it?I already tried checking the CVR hitting 0 with an if-function: if(SYST_CVR==0x00000000) but everything if this loop never got triggered.Regards, Paul
Hi again Paul
Thinking about this again, while it looks like SysTick is set up correctly, I suspect that interrupts are not enabled in the core, else (unlikely) the priority of SysTick is very low and never being handled.
Does PRIMASK = 0? If set to 1, then IRQs are not handled.
https://developer.arm.com/documentation/dui0497/a/cortex-m0-peripherals/nested-vectored-interrupt-controller/nvic-usage-hints-and-tips
Hi RonanAs far as i understand the function __enable_irq() should also be setting PRIMASK to 0. The additional command __get_PRIMASK (void) which should be setting PRIMASK according to a post by CMSIS.I realized that the COUNTFLAG bit in SYST_CSR gets set but never reset maybe my issue has something to do with that.Do you have any more ideas?
COUNTFLAG will be cleared if you read SYST_CSR, That it is set shows that the timer counter is going thru 0, and so should be throwing the exception.
I believe the issue is with your NVIC setup, but I can't see what exactly from the above, sorry :(
I found the isr.c file, sadly there is no explanation on the set values not even in the header.it might be that NVIC isn't enabled since i never touched these functions before./* ========================================================================== */void Interrupt_Config(void){ /* Clear interrupt pending register */ NVIC_UNPEND0 = 0xFFFFFFFF;
/* Set priority of NVIC interrupt */ NVIC_PRI0 = 0x80400000; NVIC_PRI1 = 0xC0C0C0C0;
/* * Enable NVIC interrupts * NVIC interrupt for external interrupt 1 i.e. TADC is disabled */ NVIC_ENABLE0 = 0xFFFFFFFD;}any guesses on that?
Can you determine what address NVIC_ENABLE0 is at? Is should be the ISER [0xE000E100], but could it mistakenly be the ICER [0xE000E180]?
https://developer.arm.com/documentation/dui0497/a/cortex-m0-peripherals/nested-vectored-interrupt-controller?lang=en
https://developer.arm.com/documentation/dui0497/a/cortex-m0-peripherals/nested-vectored-interrupt-controller/interrupt-set-enable-register?lang=en
https://developer.arm.com/documentation/dui0497/a/cortex-m0-peripherals/nested-vectored-interrupt-controller/interrupt-clear-enable-register?lang=en
NVIC_ENABLE0 is at [0xE000E100]