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Function Called by Current Valure Register(SYST_CVR) with SysTick

PaulR

Hello guys,
Im trying to use the timer registers of my ARM Cortex M0 while using my pga970EVM. Unfortionally there aren't any files/Commands refering to using the 3 registers SYST_CSR, SYST_RVR, SYST_CVR. I figured out how these registers are working quite easily: SYST_CVR is set to the Reload Value which is defined by SYST_RVR. When SYST_CSR is enabled, SYST_CVR  gets lowered periodically and when reaching 0 its Value is reset to the reload Value. Normally there should be a function which is called as soon as the Current Value Register hits 0 but there is none in my generic firmware. The link provides the information I have on these registers.

Cortex-M0 Devices Generic User Guide (arm.com)

Do I have to write a function my own? If so how can i do it?
I already tried checking the CVR hitting 0 with an if-function: if(SYST_CVR==0x00000000)  but everything if this loop never got triggered.
Regards, Paul

Parents
  • 0 in reply to Ronan Synnott

    I found the isr.c file, sadly there is no explanation on the set values not even in the header.
    it might be that NVIC isn't enabled since i never touched these functions before.
    /* ========================================================================== */
    void Interrupt_Config(void)
    {
    /* Clear interrupt pending register */
    NVIC_UNPEND0 = 0xFFFFFFFF;

    /* Set priority of NVIC interrupt */
    NVIC_PRI0 = 0x80400000;
    NVIC_PRI1 = 0xC0C0C0C0;

    /*
    * Enable NVIC interrupts
    * NVIC interrupt for external interrupt 1 i.e. TADC is disabled
    */
    NVIC_ENABLE0 = 0xFFFFFFFD;
    }

    any guesses on that? 

Reply
  • 0 in reply to Ronan Synnott

    I found the isr.c file, sadly there is no explanation on the set values not even in the header.
    it might be that NVIC isn't enabled since i never touched these functions before.
    /* ========================================================================== */
    void Interrupt_Config(void)
    {
    /* Clear interrupt pending register */
    NVIC_UNPEND0 = 0xFFFFFFFF;

    /* Set priority of NVIC interrupt */
    NVIC_PRI0 = 0x80400000;
    NVIC_PRI1 = 0xC0C0C0C0;

    /*
    * Enable NVIC interrupts
    * NVIC interrupt for external interrupt 1 i.e. TADC is disabled
    */
    NVIC_ENABLE0 = 0xFFFFFFFD;
    }

    any guesses on that? 

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