Hi,
I was trying to test DSU (DynamIQ Share Unit) PMU (Performance Monitor Unit) with the example PMU_Aarch64-FVP_Cortex-A73x2-A53x4 project coming with Arm Development Studio R1.0, and I always get SyncError exception. I did modifiy the Start.S to set bit 12 of ACTLR_EL3 and ACTLR_EL2, but no help. Could anyone help on this to see why?
Thanks
Xiaoming
Hi Rob,
The example coming with DS-5 is testing PMUs for each core. I have no issues to run it. What I wanted to test is cluster PMUs inside DSU. I got exception when executing the first instruction MRS to read CLUSTERPMCR_EL1 register in following sequence:
EL1N:0x0000000080002E7C : MRS x8,S3_0_C15_C5_0EL1N:0x0000000080002E80 : MOV x9,#0x46EL1N:0x0000000080002E84 : MOV w10,#0xffffffffEL1N:0x0000000080002E88 : BFXIL x8,x9,#0,#7
...
If PMU is partially implemented in FVP, this is understood.
Hi Xiaoming, I overlooked this in my earlier answer. The Cortex-A73 and Cortex-A53 pre-date the introduction of the DSU concept. Each cluster has it's own L1 + L2 and can snoop the other CPU's cache through a cache-coherent interconnect (e.g. CCI550). The DSU PMU registers will therefore not be present in the FVP that you are using.
The DSU was first introduced with the Cortex-A75 and Cortex-A55 cores.