i write source for st32f407,that port PE.2 is toggle with delay 1 second for code we use cmsis library. why when in logic analyzer we add signal port PE.2 is has error unknown signal.....!!1 can any help me thanks for reply
Below link should be helpful: http://www.keil.com/support/docs/814.htm
Also go through other links which are mentioned in above link
thanks for guidance
now i created a memory.ini file and i added to debug option this is my content ini file:
MAP MAP 0x00000000, 0xFFFFFFFF READ WRITE // allow R/W access to IO space
i allow all memory read/write now it is has errors:
Running with Code Size Limit: 32K Load "C:\\Users\\root\\Desktop\\StCubeMX\\keil5\\Objects\\429.axf"
*** Restricted Version with 32768 Byte Code Size Limit *** Currently used: 4344 Bytes (13%)
Include "C:\\Users\\root\\Desktop\\StCubeMX\\keil5\\memory.ini" MAP MAP 0x00000000, 0xFFFFFFFF READ WRITE // allow R/W access to IO space 0x00000000 - 0x000010EF exec read 0x000010F0 - 0x00001757 exec read write 0x00001758 - 0x000FFFFF exec read 0x08000000 - 0x080010EF exec read 0x080010F0 - 0x08001757 exec read write 0x08001758 - 0x080FFFFF exec read 0x20000000 - 0x2002FFFF read write 0xE0000000 - 0xE0000FFF read write 0xE000E000 - 0xE000EFFF read write _____^ *** error 10: Syntax error *** error 65: access violation at 0x40023800 : no 'read' permission
how i can solve my problem?
i uses library pack cmsis for st4 series and i uses SVD keil for option system viewer file: SFD\ST\STM32F4xx\STM32F429x.SFR
So you have problems.
And then you directly visited Google and tried "keil simulation st32f407"
And you very quickly found this thread: www.keil.com/.../
and this Keil link: http://www.keil.com/dd/chip/6103.htm
and your conclusion was to create a new thread to ask why it doesn't work to simulate the chip...
thanks so i should i use stdeugger.