I want to modify cache latency parameter in system canvas,and I use FVP_Base_Neoverse-N1 to build my system,so is it correct to modify the cache parameters like this?
setting the cache modelling on, and timing annotation on, allows you to annotate estimated delays on cache accesses. however, adding delay estimates to the memory accesses - which I think is what you are looking for - requires an additional step.
to annotate delays to the memory access, requires that the memory model be implemented in SystemC and connected to the Fast Model through an AMBA-PV port. Fast Models uses the time parameter on the b_transports as defined in the TLM 2.0 specifications to annotate the estimated delays.
You will need to modify the FVP source example you are using to make this possible as within the FVP the memory is currently modelled within the Fast Models subsystem. This is quite a complex subject: if you would like to continue I think we should move this discussion to our support channel rather than using the forum.
One other question to ask: does the application code that are running on the FVP configure and enable the caches? As well as enabling the cache models in the FVP the code itself needs to implement the correct cache setup code before instructions and data are saved in the caches in the model (in the same way that it would need to be set up on a hardware target),
Hi Rob
Thanks a lot and sorry for the late reply. the application code that are running on the FVP don't need to configure the caches. And I have created a case-Adding delay estimates to the memory accesses on Surpport, can we move to there to discuss?
regards
qiqi