Arm Community
Arm Community
  • Site
  • User
  • Site
  • Search
  • User
Support forums
Support forums
Architectures and Processors forum
  • Jump...
  • Cancel
  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3594 Questions
Help a member

Have a question? If you can, please take a moment to also see if there is a question that you are able to answer.

  • Tags
  • RSS
  • More actions
  • Cancel
Other forums
  • AI forum

  • Architectures and Processors forum

  • Arm Development Platforms forum

  • Arm Development Studio forum

  • Arm Virtual Hardware forum

  • Automotive forum

  • Compilers and Libraries forum

  • Embedded and Microcontrollers forum

  • High Performance Computing (HPC) forum

  • Internet of Things (IoT) forum

  • Keil forum

  • Laptops and Desktops forum

  • Mobile, Graphics, and Gaming forum

  • Morello forum

  • Operating Systems forum

  • Servers and Cloud Computing forum

  • SoC Design and Simulation forum

  • SystemReady Forum

  • Answered

    updating CPSR in USER UNPRIVILEGED mode 0

    • Armv7-A
    • Cortex-A
    • Cortex-M
    • Cortex-M4
    13694 views
    10 replies
    Latest over 10 years ago
    by Gopal Amlekar
  • Not Answered

    Can we run the Cortex-A53 cores at different clock speeds ? 0

    • Cortex-A53
    • Cache
    • Cortex-A
    9647 views
    5 replies
    Latest over 10 years ago
    by Ravinder
  • Not Answered

    ARM Cortex-R5 based Lock-step feature demonstration real time application? 0

    • Cortex-R
    • Cortex-R5
    8849 views
    5 replies
    Latest over 10 years ago
    by Ravinder
  • Not Answered

    I am currently an eighth grader but I have a deep interest in ARM processors, since I'm a neophyte but I have great interest could u tell me what makes ARM processors so significant? Why? Thank you :) 0

    • Armv7-A
    • Armv7-R
    • Cortex-M
    • C
    8949 views
    8 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Supported AXI transfers on Cortex-A9? +1

    • 32-bit
    • Cortex-A9
    • AXI4
    • Cortex-A
    • 64-bit
    12074 views
    9 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    On Chip RAM is slow after enabling MMU, and using external ram aborts +1

    • Cache
    • Cortex-A
    • Cortex-A8
    7253 views
    4 replies
    Latest over 10 years ago
    by Gopu
  • Answered

    [CM3]UART always lose the last char 0

    • uart
    • Cortex-M3
    • Cortex-M
    6719 views
    6 replies
    Latest over 10 years ago
    by stupidMokey
  • Answered

    Which ARM processor is HSA compatible? +1

    • big.LITTLE
    • Cortex-A
    5511 views
    1 reply
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Not Answered

    Please let me know about different between "block entry" and "table entry" in VMSAv8-64 Translation table 0

    • Armv8
    9636 views
    2 replies
    Latest over 10 years ago
    by Jongseok Kim
  • Answered

    ARM1136: why the mismatch between cache stalls and cache misses ?? +1

    • Processor
    • Cache
    • Arm11
    11269 views
    10 replies
    Latest over 10 years ago
    by Zhan Chen
  • Answered

    Question about application of PendSV 0

    • Cortex-M
    • Cortex-M4
    26614 views
    8 replies
    Latest over 10 years ago
    by Gopal Amlekar
  • Answered

    Cache Memory Requirement 0

    • Cortex-R
    • Cache
    • Cortex-A
    • Cortex-M
    9176 views
    6 replies
    Latest over 10 years ago
    by Jerome Decamps - 杜尚杰
  • Answered

    ARM Cortex M3 STM32F207 processor hangs during the initializing if the code-size is more then 64k 0

    • Cortex-M3
    • Cortex-M
    4775 views
    2 replies
    Latest over 10 years ago
    by Stefan Tesche
  • Answered

    If CAN receive buffer is'nt cleared before a new message arrives,will it over-write the earlier data? 0

    • Cortex-M3
    • Cortex-M
    7375 views
    3 replies
    Latest over 10 years ago
    by Allen Willson
  • Answered

    Cortex-A9 core registers 0

    • Cortex-A9
    • Cortex-A
    6992 views
    3 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Not Answered

    Can AXI data channel drop a burst? 0

    • AXI
    3379 views
    1 reply
    Latest over 10 years ago
    by Xingguang Feng Arm Employee Badge
  • Answered

    ARMv8 Secure EL1 problem 0

    • EL1
    • Armv7-A
    • Armv8-A
    • AArch32
    14540 views
    8 replies
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Answered

    How to do cache invalid on Cortex-A53? +1

    • Cortex-A53
    • Cache
    • Cortex-A
    11538 views
    5 replies
    Latest over 10 years ago
    by yan.wy
  • Answered

    AXI4: Write-Alignemnent modes? Partial writing with write strobes possible? 0

    • 32-bit
    • AXI
    • AXI4
    17549 views
    8 replies
    Latest over 10 years ago
    by David Harriman-Smith Arm Employee Badge
  • Not Answered

    The new high performance ARM Cortex M7 Introduction 0

    • Cortex-M7
    • Cortex-M
    5397 views
    5 replies
    Latest over 10 years ago
    by Alban Rampon
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone