There is a system with two CPU,for example,cpuA and cpuB. Firstly, cpuA issue a LDREX for accessing the address A,and cpuB issued a STORE for writing the address A. If CPUA send a STREX for writing the address A after the Store issued by cpuB。 I notice that there is an EXOKAY response on the AXI bus， I think it is abnormal，the STDEX opreration should be failed。 By the way，the addressA located in a shareable memory，which have a global monitor.
If you look at Table A3-4 in the ARMv7-A/R Architecture Reference Manual (Rev C.c), the notes say that it it IMPLEMENTATION DEFINED whether a non-exclusive store affects the Global Monitor.