What does it mean that an instruction is a hint instruction, like NOP, YIELD and WFE?
I haven't found any explanations in ARM Architecture Reference Manual, ARMv7-A and ARMv7-R edition, Issue C.
[EDIT]
Aha, this has already been answered in:
Are processors really only "taking a hint" for WFE,WFI,SEV?
It would have been nice to know what instructions like NOP and YIELD affect the HW, or are the hint instructions more like partially/fully implementation dependent?
[/EDIT]
And in the same manual:
B9.3.10 MSR (Banked register)
Encoding A1 ARMv7VE
MSR<c> <banked_reg>, <Rn>
Is ARMv7VE a version/profile/variant of ARMv7-A or ARMv7-R?
Is this instruction there in ARMv7-A?
What are M1 and M?
Aha, The M1 and M are explained in ARMv8 ARM.
Is it so, that the mask is 5-bit field and the M is the highest order bit that's got separated from the rest?
Hello,
the behavior (or side effect) of NOP or YIELD is implementation dependent.
As far as I know, NOP or YIELD would affect nothing to the hardware.
A silicon vendor which has the architecture license can add a side effect to those instructions for their convenience.
For example, at the x86 architecture YIELD is the same as a very slow NOP (taking about several cycles for execution).
Best regards,
Yasuhiko Koumoto.
Thanks. I suspected something like that.