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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3584 Questions
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  • Answered

    If an arm core doesn't support VFP, so it cannot support float number compute? 0

    • Cortex-A
    3537 views
    1 reply
    Latest over 10 years ago
    by Chris Shore
  • Answered

    AMBA AXI can set data transfer cacheable or bufferable, I want ask this cache or buffer refer to the cache or buffer inside AXI interconnect or system cache? 0

    • AMBA
    • AXI
    • Cache
    • C
    12082 views
    2 replies
    Latest over 10 years ago
    by Kun.Niu
  • Not Answered

    Still more stupid questions on Cortex-A7 instruction set 0

    • Armv7-A
    • Armv7-R
    • Cortex-A
    • Cortex-A7
    • C
    3937 views
    2 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    AARCH64 assembly syntax for ARMCLANG 0

    • AArch64
    • NEON
    5633 views
    1 reply
    Latest over 10 years ago
    by Martin Weidmann Arm Employee Badge
  • Not Answered

    Bit 22 in some LD/ST instructions (Cortex-A7) 0

    • Cortex-A
    • Cortex-A7
    8603 views
    12 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Instruction timings - arm cortex m3 0

    • Cortex-M3
    • Cortex-M
    36876 views
    16 replies
    Latest over 10 years ago
    by Jens Bauer
  • Answered

    Why or how does SysTick interrupt wakeup the processor? 0

    • Cortex-M0
    • Cortex-M
    23777 views
    10 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex-A53 - GICv4 Documentation 0

    • Cortex-A53
    • Cortex-A9
    • Cortex-A
    9427 views
    4 replies
    Latest over 10 years ago
    by anoop
  • Answered

    UPREDICTABLE instructions 0

    • Armv7-A
    • Armv7-R
    • Thumb
    7583 views
    8 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Not Answered

    Cortex-A5 Evaluation boards 0

    • Cortex-A5
    • Cortex-A
    7332 views
    6 replies
    Latest over 10 years ago
    by Axel Heider
  • Answered

    Cortex-A5 based processors +1

    • Cortex-A9
    • Cortex-A5
    • Cortex-A
    • Cortex-A8
    7208 views
    3 replies
    Latest over 10 years ago
    by Axel Heider
  • Not Answered

    ARM_V8 instruction Cycles timings 0

    • Cortex-A57
    • NEON
    • Cortex-A
    13942 views
    5 replies
    Latest over 10 years ago
    by Matt Sealey Arm Employee Badge
  • Answered

    Compute the division via shift instruction +1

    • Cortex-M0
    • Cortex-M
    4057 views
    4 replies
    Latest over 10 years ago
    by Jerome Decamps - 杜尚杰
  • Not Answered

    does different arm TRM revisions also have changes in Hardware? 0

    • Cortex-A9
    • Cortex-A
    3295 views
    2 replies
    Latest over 10 years ago
    by anoop
  • Answered

    ARM FULL VIRTUALISATION SOFTWARE 0

    • Cortex-A17
    • Cortex-A
    8641 views
    7 replies
    Latest over 10 years ago
    by Mike Clark
  • Answered

    ARM Cortex-M0 Details +1

    • Cortex-M0
    • Cortex-M
    17491 views
    7 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Not Answered

    TRANSFER CONTINUE AFTER ERROR RESPONSE FROM SLAVE 0

    • AMBA
    • AHB
    8011 views
    6 replies
    Latest over 10 years ago
    by Yasuhiko Koumoto
  • Answered

    About PL310 cache controller and data aborts 0

    • Armv7-A
    • Cache
    4574 views
    2 replies
    Latest over 10 years ago
    by Niranjan Dighe
  • Answered

    I cannot write the sp register in the monitor mode +1

    • Armv7-A
    • Cortex-A
    • Cortex-A7
    24482 views
    21 replies
    Latest over 10 years ago
    by Juha Aaltonen
  • Answered

    Dhrystone Testing on Cortex A9: disabling Prints increases the DMIPS. 0

    • Armv7-A
    • Cortex-A9
    • Cortex-A
    6554 views
    3 replies
    Latest over 10 years ago
    by Peter Harris Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
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  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
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  • Cortex-M0
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  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
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  • NEON
  • TrustZone