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The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean?

Kun.Niu

The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean?

I find some answers say that dual-issue means that the cortex-A7 can issue two instructions per clock.

But in the cortex-A7's pipeline diagraph, it has integer, multiply, floating-pointing/NEON, dual issue, load/store.

I also want to ask the dual issue there refers to what? It has what fuction or how it works?

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  • 0 in reply to Kun.Niu

    Hello,

    according to GCC source code for Cortex-A7 (gcc/cortex-a7.md at master · gcc-mirror/gcc · GitHub), the following commens exist.

    However, it would not be the official information from ARM,

    ;; A direct branch can dual issue either as younger or older instruction, but branches cannot dual issue with branches. No latency as there is no result.
    ;; Call cannot dual-issue as an older instruction. It can dual-issue as a younger instruction, or single-issue. Call cannot dual-issue with another branch instruction. The result is available the next cycle.
    ;; ALU instruction with an immediate operand can dual-issue.
    ;; ALU instruction with register operands can dual-issue with a younger immediate-based instruction.

    Best regards,

    Yasuhiko Koumoto.


Reply
  • 0 in reply to Kun.Niu

    Hello,

    according to GCC source code for Cortex-A7 (gcc/cortex-a7.md at master · gcc-mirror/gcc · GitHub), the following commens exist.

    However, it would not be the official information from ARM,

    ;; A direct branch can dual issue either as younger or older instruction, but branches cannot dual issue with branches. No latency as there is no result.
    ;; Call cannot dual-issue as an older instruction. It can dual-issue as a younger instruction, or single-issue. Call cannot dual-issue with another branch instruction. The result is available the next cycle.
    ;; ALU instruction with an immediate operand can dual-issue.
    ;; ALU instruction with register operands can dual-issue with a younger immediate-based instruction.

    Best regards,

    Yasuhiko Koumoto.


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