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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3585 Questions
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  • Not Answered

    ARM CM4 FPU execption 0

    • Cortex-M
    • Cortex-M4
    3475 views
    3 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    Cortex-M interrupts queue +1

    • Cortex-M
    5184 views
    1 reply
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    In aarch32 state, what is the mechanism to switch to aarch64 in software? 0

    • EL1
    • AArch64
    • AArch32
    11695 views
    5 replies
    Latest over 9 years ago
    by cray
  • Answered

    [ELF/Thumb] Is it possible to create library procedures in Thumb-mode only ? 0

    • Thumb2
    • Linux
    6994 views
    3 replies
    Latest over 9 years ago
    by Myy
  • Answered

    Read/Write from register +1

    • Cortex-M0
    • Cortex-M
    • C
    5331 views
    3 replies
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Answered

    Data Abort Exception in A53 +1

    • Cortex-A53
    • AXI
    • Memory Management Unit (MMU)
    • Cortex-A
    7425 views
    3 replies
    Latest over 9 years ago
    by Kelvin Arm Employee Badge
  • Answered

    Bit-banding in SRAM region (Cortex-M4) +1

    • Cortex-M
    • C
    • Cortex-M4
    8906 views
    5 replies
    Latest over 9 years ago
    by Matic
  • Answered

    What is the difference between instruction prefetch and instruction pipelining in arm7tdmi? +1

    • Arm7
    12216 views
    6 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    can anyone tell me the difference between pipelined bus and depipelined bus?and i have uploaded two screen shot of both so what does that arrow from mclk to a[31:0] indicates? 0

    • Arm7
    14260 views
    9 replies
    Latest over 9 years ago
    by Colin Campbell Arm Employee Badge
  • Answered

    Assembly programming - yes, no, when, how to start, ... ?? 0

    • Raspberry Pi
    • Cortex-M
    • C
    10449 views
    8 replies
    Latest over 9 years ago
    by Thibaut ZEISSLOFF
  • Answered

    How to get absolute value of a 32-bit signed integer as fast as possible? +1

    • 32-bit
    • Cortex-M
    • C
    • Cortex-M4
    41793 views
    12 replies
    Latest over 9 years ago
    by Thibaut ZEISSLOFF
  • Answered

    Difference between FIXED and INCR burst in AXI? 0

    • AXI
    39551 views
    10 replies
    Latest over 9 years ago
    by Chandan
  • Not Answered

    Cortex-M7 Load/store timing execution ? 0

    • Cortex-M7
    • Cortex-M
    6053 views
    3 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    What is the difference of DMB and DSB instruction? +1

    • Armv8
    36366 views
    5 replies
    Latest over 9 years ago
    by cray
  • Answered

    how to read 16-bytes from 'hxx00 address(32-byte aligned address) on a 32-byte width data bus, +1

    • AMBA
    6032 views
    3 replies
    Latest over 9 years ago
    by G. Goodwin L. Pitos
  • Not Answered

    voltage levels for dvfs 0

    • Cortex-A15
    • Cortex-A
    • Cortex-A7
    4295 views
    3 replies
    Latest over 9 years ago
    by Peter Harris Arm Employee Badge
  • Answered

    float behaivior on AARCH64 +1

    • Armv7-A
    • AArch64
    • NEON
    9418 views
    6 replies
    Latest over 9 years ago
    by Yasuhiko Koumoto
  • Answered

    DSP instruction for x*x + y*y. Does it exist? 0

    • Cortex-M
    • Cortex-M4
    13031 views
    14 replies
    Latest over 9 years ago
    by Matic
  • Answered

    ARM v8 A64 instruction 32-bit variant usage 0

    • 32-bit
    • 64-bit
    4227 views
    2 replies
    Latest over 9 years ago
    by cray
  • Answered

    Trustzone and Hardware virtualization support +1

    • Cortex-A72
    • Cortex-A53
    • Cortex-A57
    • Cortex-A
    • TrustZone
    9831 views
    4 replies
    Latest over 9 years ago
    by Ash Wilding Arm Employee Badge
<>
Topics being discussed in this forum
  • AArch64
  • AMBA
  • Arm Assembly Language (ASM)
  • Armv7-A
  • Armv8-A
  • Armv8-M
  • AXI
  • Cache
  • Cortex-A
  • Cortex-A53
  • Cortex-A7
  • Cortex-A8
  • Cortex-A9
  • Cortex-M
  • Cortex-M0
  • Cortex-M3
  • Cortex-M4
  • Cortex-M7
  • Cortex-R
  • Interrupt
  • Linux
  • Memory
  • Memory Management Unit (MMU)
  • NEON
  • TrustZone