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  • Description The latest forum discussions for Arm architectures and Cortex-A, R, M, and classic processors.
  • Threads 3600 Questions
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  • Answered

    config stage-2 translation 0

    2421 views
    2 replies
    Latest over 4 years ago
    by yzwddsg
  • Answered

    How to generate delay in CPU? +1

    • Cortex-A72
    • Arm Assembly Language (ASM)
    11330 views
    8 replies
    Latest over 4 years ago
    by David06
  • Suggested Answer

    How to debug ARM register dump after a reset? 0

    • Real Time Operating Systems (RTOS)
    • 3 (HardFault)
    • CPSR
    2996 views
    2 replies
    Latest over 4 years ago
    by tobermory
  • Not Answered

    why program counter register in core file is misaligned!!! 0

    3070 views
    4 replies
    Latest over 4 years ago
    by pht
  • Not Answered

    Longer pipelines on Cortex R's vs real-time & performance 0

    5223 views
    10 replies
    Latest over 4 years ago
    by d.ry
  • Not Answered

    Prefetch abort in ARM Cortex R processor 0

    1101 views
    0 replies
    Started over 4 years ago
    by techguyz
  • Answered

    Is ARM Trustzone resistant to the Physical Attacks ? +1

    2139 views
    3 replies
    Latest over 4 years ago
    by Manjunath Kalmath
  • Answered

    Why does ARM have 64KB Large Pages? +1

    • Arm7
    • Memory Management Unit (MMU)
    6886 views
    3 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Answered

    Is there Trustzone extension for ARM V9? 0

    4057 views
    5 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    DDI0487G_b_armv8_arm.pdf 0

    • Documentation
    2834 views
    1 reply
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Special intrinsic for the swap in vector (Helium) 0

    • Cortex-M55
    • Arm Development Studio
    • Helium
    • Corstone SSE-300
    2928 views
    7 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Answered

    How to set up stage-2 translation table +1

    • Armv8-A
    13091 views
    4 replies
    Latest over 4 years ago
    by Zenon (Zhilong) Xiu Arm Employee Badge
  • Not Answered

    Do you know of any development boards with MIPI CSI-2 inputs ? 0

    2331 views
    0 replies
    Started over 4 years ago
    by Spudd
  • Answered

    Helium intrinsic vdupq_x_n_f32 0

    • Cortex-M55
    • Arm Development Studio
    • Helium
    • Corstone SSE-300
    4274 views
    4 replies
    Latest over 4 years ago
    by Yevhenii Prilipukhov
  • Answered

    Cortex-M33 MTB configuration - when the MTB buffer is full 0

    • TrustZone for Armv8-M
    • Cortex-M33
    • CoreSight Micro Trace Buffer for the Cortex-M33
    3872 views
    3 replies
    Latest over 4 years ago
    by Mintancy
  • Suggested Answer

    armv8 mmu level1 level2 page table size for different granule 0

    4497 views
    3 replies
    Latest over 4 years ago
    by a.surati
  • Suggested Answer

    Using LDREXD in a task/normal mode and STREXD in ISR 0

    4457 views
    11 replies
    Latest over 4 years ago
    by 42Bastian Schick
  • Answered

    hi iam trying to find FFT using stm32F4 discovery board. i have tried using CFFT and RFFT available in arm CMSIS DSP library but iam getting wrong answers. Can someone please tell me where iam wrong. Iam posting the code below for both RFFT and CFFT ? 0

    3545 views
    3 replies
    Latest over 4 years ago
    by Oliver Beirne Arm Employee Badge
  • Not Answered

    The diagram of register file in cortex-M0/M3 0

    • Cortex-M
    2057 views
    0 replies
    Started over 4 years ago
    by ARM_QUESTION
  • Not Answered

    Cortex-M3: Booting to image in NVM, then performing DDR Remap & handoff execution 0

    1439 views
    0 replies
    Started over 4 years ago
    by am71ap1
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